diff --git a/crates/applications/stacked_cores/src/main.rs b/crates/applications/stacked_cores/src/main.rs
index b40a1a0..73d9b68 100644
--- a/crates/applications/stacked_cores/src/main.rs
+++ b/crates/applications/stacked_cores/src/main.rs
@@ -29,26 +29,30 @@ type Sim = SpirvSim::<R, Mat, Backend>;
 /// different states each control signal can be in for some clock cycle.
 #[derive(Copy, Clone)]
 enum ClockState {
-    HoldHigh(f32),
-    ReleaseHigh(f32),
-    HoldLow(f32),
-    ReleaseLow(f32),
+    Hold(f32),
+    Release(f32),
     Float,
 }
 type ClockSegment = Shifted<R, Gated<R, Scaled<Exp<R>, R>>>;
 
 impl ClockState {
+    fn hold(amp: f32) -> Self {
+        Self::Hold(amp)
+    }
     fn hold_high() -> Self {
-        Self::HoldHigh(1.0)
+        Self::hold(1.0)
     }
     fn hold_low() -> Self {
-        Self::HoldLow(1.0)
+        Self::hold(-1.0)
+    }
+    fn release(amp: f32) -> Self {
+        Self::Release(amp)
     }
     fn release_high() -> Self {
-        Self::ReleaseHigh(1.0)
+        Self::release(1.0)
     }
     fn release_low() -> Self {
-        Self::ReleaseLow(1.0)
+        Self::release(-1.0)
     }
     fn float() -> Self {
         Self::Float
@@ -58,10 +62,8 @@ impl ClockState {
     {
         use ClockState::*;
         match self {
-            &HoldHigh(amp) => Some(params.control_signal_hold(cycle, amp)),
-            &ReleaseHigh(amp) => Some(params.control_signal_release(cycle, amp)),
-            &HoldLow(amp) => Some(params.control_signal_hold(cycle, -amp)),
-            &ReleaseLow(amp) => Some(params.control_signal_release(cycle, -amp)),
+            &Hold(amp) => Some(params.control_signal_hold(cycle, amp)),
+            &Release(amp) => Some(params.control_signal_release(cycle, amp)),
             Float => None,
         }
     }
@@ -243,13 +245,13 @@ fn drive_map_isolated_inv() -> [[ClockState; 2]; 6] {
 }
 
 #[allow(unused)]
-fn drive_map_3stack() -> [[ClockState; 3]; 6] {
+fn drive_map_3stack_with_init_amp(amp: f32) -> [[ClockState; 3]; 6] {
     use ClockState as C;
     [
         // charge S1 to '1', S0/S2 to '0'
-        [C::hold_low(),    C::hold_high(),   C::hold_low()   ],
+        [C::hold_low(),    C::hold(amp),     C::hold_low()   ],
         // let the cores settle
-        [C::release_low(), C::release_high(),C::release_low()],
+        [C::release_low(), C::release(amp),  C::release_low()],
         // write S1 -> S0/S2. S0/S2 should be copied to 1
         [C::float(),       C::hold_low(),    C::float()      ],
 
@@ -262,6 +264,11 @@ fn drive_map_3stack() -> [[ClockState; 3]; 6] {
     ]
 }
 
+#[allow(unused)]
+fn drive_map_3stack() -> [[ClockState; 3]; 6] {
+    drive_map_3stack_with_init_amp(1.0)
+}
+
 #[allow(unused)]
 fn drive_map_3stack_and_rev() -> [[ClockState; 3]; 6] {
     use ClockState as C;