From 9d4e245388a0c731c6f4a5c4aa144bb0144d24be Mon Sep 17 00:00:00 2001 From: colin Date: Fri, 11 Nov 2022 22:59:57 +0000 Subject: [PATCH] app: stacked_cores: new 58-xx sim which tries a complementary buffer into a pre-charged output --- .../scripts/stacked_cores_52xx.py | 4 +- .../scripts/stacked_cores_52xx_db.py | 148 ++++++++++++++++ crates/applications/stacked_cores/src/main.rs | 158 +++++++++++++++++- 3 files changed, 306 insertions(+), 4 deletions(-) diff --git a/crates/applications/stacked_cores/scripts/stacked_cores_52xx.py b/crates/applications/stacked_cores/scripts/stacked_cores_52xx.py index b7acdb6..b247560 100755 --- a/crates/applications/stacked_cores/scripts/stacked_cores_52xx.py +++ b/crates/applications/stacked_cores/scripts/stacked_cores_52xx.py @@ -11,7 +11,7 @@ from stacked_cores_52xx_db import DB ## CONSTANTS/CONFIGURATION # list of sims to extract details for -PREFIXES = { "52", "53", "54", "55", "56", "57" } +PREFIXES = { "52", "53", "54", "55", "56", "57", "58" } def times_of_interest(sim_name: str) -> list: # could be more intelligent, extracting e.g. the clock duration from the name @@ -27,6 +27,8 @@ def times_of_interest(sim_name: str) -> list: return [4e-9, 6e-9] if sim_name.startswith("57-"): return [4e-9, 6e-9] + if sim_name.startswith("58-"): + return [4e-9, 6e-9] ## USER-FACING FUNCTIONS diff --git a/crates/applications/stacked_cores/scripts/stacked_cores_52xx_db.py b/crates/applications/stacked_cores/scripts/stacked_cores_52xx_db.py index 40bba48..b2a1a71 100644 --- a/crates/applications/stacked_cores/scripts/stacked_cores_52xx_db.py +++ b/crates/applications/stacked_cores/scripts/stacked_cores_52xx_db.py @@ -2592,4 +2592,152 @@ DB = { MeasRow(6e-09, [-28765, 3057, -28922, -28773, -10817, -28781]), ], }), + '58-buf-0.0004rad-2000ctl_cond-20000coupling_cond-2000ps-100ps-4ctl-4coupling-5_1_5_1_winding-2e10-drive-': ParameterizedMeas({ + (-1.000, 1.000,): [ + MeasRow(4e-09, [ 16825, -17294, -17292, 16243, -17747, -17703]), + MeasRow(6e-09, [-27897, -5218, -16601, 14065, -12827, -27939]), + ], + ( 0.000, 0.000,): [ + MeasRow(4e-09, [ 6637, -17439, 3593, 3649, -17442, 6579]), + MeasRow(6e-09, [-27891, -6977, 2102, 2136, -7044, -27889]), + ], + ( 0.050, -0.050,): [ + MeasRow(4e-09, [ -1607, -17438, 8665, -2199, -17441, 8526]), + MeasRow(6e-09, [-27898, -8784, 6898, -2966, -6786, -27884]), + ], + ( 0.100, -0.100,): [ + MeasRow(4e-09, [-16591, -17514, 15978, -16376, -17384, 15672]), + MeasRow(6e-09, [-27933, -12358, 13796, -15847, -5531, -27890]), + ], + ( 0.150, -0.150,): [ + MeasRow(4e-09, [-17357, -17666, 16067, -17055, -17345, 16428]), + MeasRow(6e-09, [-27931, -12651, 13903, -16400, -5368, -27896]), + ], + ( 0.200, -0.200,): [ + MeasRow(4e-09, [-17407, -17678, 16143, -17064, -17325, 16495]), + MeasRow(6e-09, [-27932, -12672, 13969, -16411, -5338, -27896]), + ], + ( 0.250, -0.250,): [ + MeasRow(4e-09, [-17443, -17691, 16151, -17090, -17315, 16539]), + MeasRow(6e-09, [-27932, -12691, 13978, -16434, -5321, -27895]), + ], + ( 0.300, -0.300,): [ + MeasRow(4e-09, [-17475, -17698, 16164, -17117, -17311, 16574]), + MeasRow(6e-09, [-27931, -12706, 13994, -16458, -5311, -27895]), + ], + ( 1.000, -1.000,): [ + MeasRow(4e-09, [-17698, -17741, 16246, -17283, -17301, 16826]), + MeasRow(6e-09, [-27942, -12798, 14081, -16595, -5259, -27893]), + ], + }), + '58-buf-0.0004rad-2000ctl_cond-20000coupling_cond-2000ps-100ps-8ctl-8coupling-3_1_3_1_winding-1e10-drive-': ParameterizedMeas({ + (-1.000, 1.000,): [ + MeasRow(4e-09, [ 16996, -18409, -17937, 16015, -18875, -18865]), + MeasRow(6e-09, [-30384, -3269, -16929, 13723, -13446, -30388]), + ], + ( 1.000, -1.000,): [ + MeasRow(4e-09, [-18866, -18866, 16010, -17936, -18400, 16983]), + MeasRow(6e-09, [-30387, -13468, 13739, -16930, -3125, -30386]), + ], + }), + '58-buf-0.0004rad-2000ctl_cond-20000coupling_cond-2000ps-100ps-8ctl-8coupling-3_1_3_1_winding-5e9-drive-': ParameterizedMeas({ + (-1.000, 1.000,): [ + MeasRow(4e-09, [ 16879, -18197, -17829, 15995, -18674, -18610]), + MeasRow(6e-09, [-29641, -4802, -16866, 14323, -14315, -29648]), + ], + ( 0.000, 0.000,): [ + MeasRow(4e-09, [ 6732, -18446, 4443, 4576, -18442, 6850]), + MeasRow(6e-09, [-29643, -7140, 3161, 3092, -6953, -29645]), + ], + ( 0.020, -0.020,): [ + MeasRow(4e-09, [ 6078, -18447, 6210, 2817, -18440, 7505]), + MeasRow(6e-09, [-29643, -7099, 4210, 2014, -6990, -29644]), + ], + ( 0.050, -0.050,): [ + MeasRow(4e-09, [ 4876, -18449, 8447, 813, -18438, 8548]), + MeasRow(6e-09, [-29641, -7294, 5962, 287, -6796, -29643]), + ], + ( 0.100, -0.100,): [ + MeasRow(4e-09, [ -1722, -18444, 10666, -2030, -18437, 10429]), + MeasRow(6e-09, [-29642, -9141, 8216, -2394, -6350, -29644]), + ], + ( 0.150, -0.150,): [ + MeasRow(4e-09, [-10262, -18382, 13902, -10595, -18431, 12445]), + MeasRow(6e-09, [-29642, -11572, 11676, -10655, -5900, -29647]), + ], + ( 0.200, -0.200,): [ + MeasRow(4e-09, [-16862, -18322, 15831, -16724, -18263, 15452]), + MeasRow(6e-09, [-29648, -13543, 14018, -16155, -5058, -29641]), + ], + ( 0.250, -0.250,): [ + MeasRow(4e-09, [-18141, -18679, 15814, -17521, -18177, 16353]), + MeasRow(6e-09, [-29641, -14223, 14133, -16680, -4793, -29647]), + ], + ( 0.300, -0.300,): [ + MeasRow(4e-09, [-18298, -18708, 15819, -17626, -18162, 16502]), + MeasRow(6e-09, [-29642, -14295, 14150, -16753, -4748, -29646]), + ], + ( 1.000, -1.000,): [ + MeasRow(4e-09, [-18610, -18668, 15994, -17830, -18188, 16868]), + MeasRow(6e-09, [-29645, -14337, 14336, -16866, -4683, -29644]), + ], + }), + '58-buf-0.0004rad-2000ctl_cond-20000coupling_cond-2000ps-100ps-13ctl-13coupling-1_1_1_1_winding-5e9-drive-': ParameterizedMeas({ + (-1.000, 1.000,): [ + MeasRow(4e-09, [ 16191, -18730, -18443, 16092, -18727, -18335]), + MeasRow(6e-09, [-30153, 5202, -17632, 14459, -12072, -30161]), + ], + ( 0.000, 0.000,): [ + MeasRow(4e-09, [ 13609, -18575, 8041, 8043, -18577, 13609]), + MeasRow(6e-09, [-30152, 3450, 1800, 1808, 3449, -30153]), + ], + ( 0.020, -0.020,): [ + MeasRow(4e-09, [ 9766, -18650, 8832, 7157, -18418, 14168]), + MeasRow(6e-09, [-30151, 1465, 3248, 520, 4006, -30153]), + ], + ( 0.050, -0.050,): [ + MeasRow(4e-09, [ 731, -18636, 10064, 810, -18298, 14520]), + MeasRow(6e-09, [-30154, -2918, 6019, -6355, 4506, -30155]), + ], + ( 0.070, -0.070,): [ + MeasRow(4e-09, [ -5494, -18627, 11092, -4890, -18222, 14723]), + MeasRow(6e-09, [-30154, -5928, 8233, -12313, 4804, -30155]), + ], + ( 0.100, -0.100,): [ + MeasRow(4e-09, [-14722, -18387, 14634, -13798, -18121, 15026]), + MeasRow(6e-09, [-30156, -10189, 13249, -16702, 5188, -30156]), + ], + ( 0.120, -0.120,): [ + MeasRow(4e-09, [-17357, -18619, 15599, -17127, -18366, 15301]), + MeasRow(6e-09, [-30159, -11582, 14044, -17203, 5080, -30156]), + ], + ( 0.150, -0.150,): [ + MeasRow(4e-09, [-17988, -18799, 15713, -18141, -18720, 15553]), + MeasRow(6e-09, [-30153, -12000, 14176, -17407, 4882, -30156]), + ], + ( 0.170, -0.170,): [ + MeasRow(4e-09, [-18068, -18810, 15740, -18233, -18742, 15638]), + MeasRow(6e-09, [-30154, -12043, 14204, -17457, 4914, -30156]), + ], + ( 0.200, -0.200,): [ + MeasRow(4e-09, [-18114, -18812, 15760, -18284, -18753, 15716]), + MeasRow(6e-09, [-30154, -12064, 14223, -17497, 4947, -30155]), + ], + ( 0.220, -0.220,): [ + MeasRow(4e-09, [-18129, -18809, 15776, -18297, -18755, 15754]), + MeasRow(6e-09, [-30155, -12069, 14235, -17508, 4965, -30155]), + ], + ( 0.250, -0.250,): [ + MeasRow(4e-09, [-18144, -18803, 15799, -18309, -18756, 15798]), + MeasRow(6e-09, [-30154, -12071, 14252, -17521, 4989, -30155]), + ], + ( 0.300, -0.300,): [ + MeasRow(4e-09, [-18165, -18794, 15838, -18321, -18755, 15862]), + MeasRow(6e-09, [-30155, -12072, 14281, -17536, 5023, -30155]), + ], + ( 1.000, -1.000,): [ + MeasRow(4e-09, [-18335, -18725, 16092, -18442, -18732, 16189]), + MeasRow(6e-09, [-30158, -12074, 14459, -17634, 5200, -30153]), + ], + }), } \ No newline at end of file diff --git a/crates/applications/stacked_cores/src/main.rs b/crates/applications/stacked_cores/src/main.rs index b7a4da5..cc9efae 100644 --- a/crates/applications/stacked_cores/src/main.rs +++ b/crates/applications/stacked_cores/src/main.rs @@ -1370,7 +1370,7 @@ fn drive_map_split_54(amp: f32) -> [[ClockState; 3]; 4] { // amplitudes are inverted from what you would expect. // hold(-1) puts the core into a positive M [ - // init S1 pos; charge S0 neg, S3 neg + // init S1 pos; charge S0 neg, S2 neg [C::release_high(), C::release(-amp), C::release_high()], // clear S1 -> {S0, S2} [C::float(), C::hold_high(), C::float(), ], @@ -1430,6 +1430,21 @@ fn drive_map_buf_57(amp0: f32, amp1: f32) -> [[ClockState; 6]; 3] { ] } +#[allow(unused)] +fn drive_map_buf_58(amp0: f32, amp1: f32) -> [[ClockState; 6]; 3] { + use ClockState as C; + // amplitudes are inverted from what you would expect. + // hold(-1) puts the core into a positive M + [ + // init S2/S5 pos, S3/S0 pos; charge S1/S4 neg + [C::hold(-amp1), C::hold_high(), C::hold(-amp0), C::hold(-amp1), C::hold_high(), C::hold(-amp0), ], + // let settle + [C::release(-amp1), C::release_high(), C::release(-amp0), C::release(-amp1), C::release_high(), C::release(-amp0),], + // clear S0 -> S1 -> S2, S5 -> S4 -> S3 + [C::hold_high(), C::float(), C::float(), C::float(), C::float(), C::hold_high(), ], + ] +} + fn asymmetric_inverter_name(p: &Params, sim_id: &str, windings: u32, init_flt: f32) -> String { let init_int = (init_flt.abs() * 100.0 + 0.5) as u32; let init_level = if init_flt > 0.0 { @@ -6194,7 +6209,7 @@ fn main() { // e.g. L=3, A=6 gives 39 // y(-20900) = -4200 y(16800) = 10700 - // slope = 055 from x-17000 to -2700 + // slope = 0.55 from x-17000 to -2700 (true, 2e3, 2e4, ps(2000), ps(100), 8, 2, um(400), 2e9), // y(-21400) = -400, y(16900) = 16900 // slope = 0.75 from x=-17000 to -7000 @@ -6363,7 +6378,7 @@ fn main() { } } - if true { + if false { for init_set in [ &[ // establish rough domain/range @@ -6563,6 +6578,143 @@ fn main() { } } } + + if true { + for init_set in [ + &[ + // establish rough domain/range + ( 1.00, -1.00), + (-1.00, 1.00), // technically extraneous + ][..], + &[ + ( 0.00, 0.00), + ( 0.30, -0.30), + ( 0.20, -0.20), + ( 0.10, -0.10), + // (-1.00, -1.00), // uninitialized case + ][..], + &[ + // negative side + // (-0.10, 0.10), + // (-0.20, 0.20), + // (-0.25, 0.25), + // (-0.05, 0.05), + // (-0.15, 0.15), + ][..], + &[ + // more detailed sweep + ( 0.05, -0.05), + ( 0.15, -0.15), + ( 0.25, -0.25), + ][..], + &[ + // even more verbosity + // (-0.02, 0.02), + // (-0.07, 0.07), + // (-0.12, 0.12), + // (-0.17, 0.17), + // (-0.22, 0.22), + + ( 0.02, -0.02), + ( 0.07, -0.07), + ( 0.12, -0.12), + ( 0.17, -0.17), + ( 0.22, -0.22), + ][..], + &[ + ( 0.01, -0.01), + ( 0.03, -0.03), + ( 0.04, -0.04), + ( 0.06, -0.06), + ( 0.08, -0.08), + ( 0.13, -0.13), + ( 0.18, -0.18), + ( 0.23, -0.23), + ][..], + ] { + for (ctl_cond, coupling_cond, clock_duration, clock_decay, coupling_loops, inp_loops, s_major, cur_flt) in [ + // total slot use is L*(4*A + 1), + // where L is the "coupling loops" and A is the inp_loops ("asymmetric loops") + // e.g. L=8, A=1 gives 40 + // e.g. L=4, A=2 gives 36 + // e.g. L=3, A=3 gives 39 + // special case of A=0 is L*(2 + 1) + // L=13, A=0 gives 39 + + // this has runs actually increasing M2-M3 + // Y(-18700, 15800) = ( 15300, -17300) + (2e3, 2e4, ps(2000), ps(100), 13, 0, um(400), 5e9), + // Y(-18600, 16900) = ( 14300, -16900) + (2e3, 2e4, ps(2000), ps(100), 8, 1, um(400), 5e9), + // Y(-17700, 16800) = ( 14100, -16600) + (2e3, 2e4, ps(2000), ps(100), 4, 2, um(400), 2e10), + + // Y(-18900, 17000) = ( 13700, -16900) + // (2e3, 2e4, ps(2000), ps(100), 8, 1, um(400), 1e10), + ] { + for &(init_flt_a, init_flt_b) in init_set { + // layout: + // M0 => M1 => M2 <-> M3 <= M4 <= M5 + // + // `=>` means asymmetric, `->` means symmetric + let slots_per_asym = (2*inp_loops).max(1); + let net_slots = 2*slots_per_asym + 1; + let mut params = params_v2 + .with_clock_phase_duration(clock_duration) + .with_clock_decay(clock_decay) + .with_ctl_conductivity(ctl_cond) + .with_coupling_conductivity(coupling_cond) + .with_s_major(s_major) + .with_coupling_loops(coupling_loops) + .with_input_magnitude(cur_flt) + // control loops + .with_coupling(0, 0, 0, net_slots, CouplingMethod::Control) + .with_coupling(1, 1, 0, net_slots, CouplingMethod::Control) + .with_coupling(2, 2, 0, net_slots, CouplingMethod::Control) + .with_coupling(3, 3, 0, net_slots, CouplingMethod::Control) + .with_coupling(4, 4, 0, net_slots, CouplingMethod::Control) + .with_coupling(5, 5, 0, net_slots, CouplingMethod::Control) + ; + for i in 0..slots_per_asym { + // couple output core 2 to output 3 + params = params.with_coupling(2, 3, 1+i, net_slots, CouplingMethod::Direct); + } + if inp_loops != 0 { + // couple input M0 -> M1 + params = couple_asymmetric_buffer_bi(¶ms, 0 /* low core */, inp_loops /* M0 loops */, 0 /* M1 loops */, 1 /* slot offset */, net_slots); + // couple M1 -> M2 + params = couple_asymmetric_buffer_bi(¶ms, 1 /* low core */, inp_loops /* M1 loops */, 0 /* M2 loops */, 1 + slots_per_asym /* slot offset */, net_slots); + // couple input M5 -> M4 + params = couple_asymmetric_buffer_bi(¶ms, 4 /* low core */, 0 /* M4 loops */, inp_loops /* M5 loops */, 1 /* slot offset */, net_slots); + // couple M4 -> M3 + params = couple_asymmetric_buffer_bi(¶ms, 3 /* low core */, 0 /* M3 loops */, inp_loops /* M4 loops */, 1 + slots_per_asym /* slot offset */, net_slots); + } else { + // directly couple M0 -> M1, M1 -> M2, M5 -> M4, M4 -> M3 + params = params.with_coupling(0, 1, 1, net_slots, CouplingMethod::Direct); + params = params.with_coupling(1, 2, 2, net_slots, CouplingMethod::Direct); + params = params.with_coupling(3, 4, 2, net_slots, CouplingMethod::Direct); + params = params.with_coupling(4, 5, 1, net_slots, CouplingMethod::Direct); + } + + let name = asymmetric_binary_gate_name_v2( + ¶ms, + "58-buf", + coupling_loops /* ctl loops */, + coupling_loops, + 2*inp_loops + 1, + 2*inp_loops + 1, + init_flt_a, + init_flt_b, + ); + run_sim( + &name, + drive_map_buf_58(init_flt_a, init_flt_b), + params, + ); + } + } + } + } }