diff --git a/Cargo.lock b/Cargo.lock
index 307eb7c..0f474f4 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -160,6 +160,7 @@ dependencies = [
 name = "buffer_proto5"
 version = "0.1.0"
 dependencies = [
+ "bincode",
  "coremem",
  "log",
  "serde",
diff --git a/crates/applications/buffer_proto5/Cargo.toml b/crates/applications/buffer_proto5/Cargo.toml
index 11c73ad..e47a76e 100644
--- a/crates/applications/buffer_proto5/Cargo.toml
+++ b/crates/applications/buffer_proto5/Cargo.toml
@@ -5,6 +5,7 @@ authors = ["Colin <colin@uninsane.org>"]
 edition = "2021"
 
 [dependencies]
+bincode = "1.3"  # MIT
 coremem = { path = "../../coremem" }
 log = "0.4"
 serde = "1.0"
diff --git a/crates/coremem/src/util/cache.rs b/crates/applications/buffer_proto5/src/cache.rs
similarity index 97%
rename from crates/coremem/src/util/cache.rs
rename to crates/applications/buffer_proto5/src/cache.rs
index 9d5651a..a5f64e1 100644
--- a/crates/coremem/src/util/cache.rs
+++ b/crates/applications/buffer_proto5/src/cache.rs
@@ -9,6 +9,7 @@ pub struct DiskCache<K, V, S=NoSupplier> {
 }
 
 impl<K: DeserializeOwned, V: DeserializeOwned> DiskCache<K, V, NoSupplier> {
+    #[allow(dead_code)]
     pub fn new(path: &str) -> Self {
         Self::new_with_supplier(path, NoSupplier)
     }
@@ -48,6 +49,7 @@ impl<K: Serialize, V: Serialize, S> DiskCache<K, V, S> {
 }
 
 impl<K: PartialEq + Serialize, V: Serialize + Clone, S> DiskCache<K, V, S> {
+    #[allow(dead_code)]
     pub fn get_or_insert_with<F: FnOnce() -> V>(&mut self, k: K, f: F) -> V {
         if let Some(v) = self.get(&k) {
             return v.clone();
diff --git a/crates/applications/buffer_proto5/src/main.rs b/crates/applications/buffer_proto5/src/main.rs
index dd72163..8cb9348 100644
--- a/crates/applications/buffer_proto5/src/main.rs
+++ b/crates/applications/buffer_proto5/src/main.rs
@@ -10,10 +10,13 @@ use coremem::render::CsvRenderer;
 use coremem::sim::spirv::{SpirvSim, WgpuBackend};
 use coremem::sim::units::{Seconds, Time as _};
 use coremem::stim::{CurlStimulus, Exp1, Gated, Sinusoid1, TimeVarying as _};
-use coremem::util::cache::DiskCache;
 use log::{error, info, warn};
 use serde::{Deserialize, Serialize};
 
+mod cache;
+
+use cache::DiskCache;
+
 type Mat = IsoConductorOr<f32, Ferroxcube3R1MH>;
 
 #[allow(unused)]
diff --git a/crates/coremem/src/lib.rs b/crates/coremem/src/lib.rs
index d6e890a..0cf9ff5 100644
--- a/crates/coremem/src/lib.rs
+++ b/crates/coremem/src/lib.rs
@@ -13,7 +13,6 @@ pub mod meas;
 pub mod render;
 pub mod sim;
 pub mod stim;
-pub mod util;
 
 pub use driver::*;
 pub use sim::*;
diff --git a/crates/coremem/src/util/mod.rs b/crates/coremem/src/util/mod.rs
deleted file mode 100644
index a5c08fd..0000000
--- a/crates/coremem/src/util/mod.rs
+++ /dev/null
@@ -1 +0,0 @@
-pub mod cache;