From a86339b0e58a8c62fa4fab59841794fe99502e58 Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Sun, 21 May 2023 01:42:25 +0200
Subject: [PATCH 388/463] arm64: dts: rk3399-pinephone-pro: Pre-configure DMC

This enables dynamic DRAM reclocking. The node needs to be okayed
by U-Boot/firmware combo known to support it. Do not enable &dmc
by default.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
 arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi  | 29 ++++++++++++++++
 .../dts/rockchip/rk3399-pinephone-pro.dts     | 33 +++++++++++++++++++
 2 files changed, 62 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
index fee5e71112799..3775d0ea254e0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
@@ -102,6 +102,31 @@ opp05 {
 			opp-microvolt = <1100000 1100000 1150000>;
 		};
 	};
+
+	dmc_opp_table: opp-table-3 {
+		compatible = "operating-points-v2";
+
+		opp00 {
+			opp-hz = /bits/ 64 <328000000>;
+			opp-microvolt = <900000>;
+		};
+		opp01 {
+			opp-hz = /bits/ 64 <416000000>;
+			opp-microvolt = <900000>;
+		};
+		opp02 {
+			opp-hz = /bits/ 64 <666000000>;
+			opp-microvolt = <900000>;
+		};
+		opp03 {
+			opp-hz = /bits/ 64 <856000000>;
+			opp-microvolt = <900000>;
+		};
+		opp04 {
+			opp-hz = /bits/ 64 <928000000>;
+			opp-microvolt = <925000>;
+		};
+	};
 };
 
 &cpu_l0 {
@@ -128,6 +153,10 @@ &cpu_b1 {
 	operating-points-v2 = <&cluster1_opp>;
 };
 
+&dmc {
+	operating-points-v2 = <&dmc_opp_table>;
+};
+
 &gpu {
 	operating-points-v2 = <&gpu_opp_table>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
index b06d0b0bda541..02f28c6d8d50b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
@@ -556,6 +556,39 @@ &cdn_dp {
 	phys = <&tcphy0_dp>;
 };
 
+&dfi {
+	status = "okay";
+};
+
+&dmc {
+	// This node can only be enabled by FDT patching from U-Boot that
+	// uses Rockchip TPL/TF-A. DMC only works with the downstream firmware.
+	// If you enabled this on mainline, your phone will lock up on boot.
+	//status = "okay";
+
+	center-supply = <&vdd_center>;
+
+	rockchip,pd-idle-ns = <160>;
+	rockchip,sr-idle-ns = <10240>;
+	rockchip,sr-mc-gate-idle-ns = <40960>;
+	rockchip,srpd-lite-idle-ns = <61440>;
+	rockchip,standby-idle-ns = <81920>;
+
+	rockchip,lpddr4_odt_dis_freq = <666000000>;
+
+	rockchip,srpd-lite-idle-dis-freq-hz = <0>;
+	rockchip,standby-idle-dis-freq-hz = <928000000>;
+	rockchip,sr-mc-gate-idle-dis-freq-hz = <800000000>;
+	rockchip,pd-idle-dis-freq-hz = <800000000>;
+	rockchip,sr-idle-dis-freq-hz = <800000000>;
+};
+
+&dmc_opp_table {
+	opp00 {
+		opp-suspend;
+	};
+};
+
 &emmc_phy {
 	status = "okay";
 };
-- 
2.46.0

