diff --git a/src/bsp.rs b/src/bsp.rs
index 021384a..46b7f23 100644
--- a/src/bsp.rs
+++ b/src/bsp.rs
@@ -1,15 +1,16 @@
 //! Initialization code
 
 
-pub use f3::hal::stm32f30x::{gpioa, gpioc, rcc};
+pub use f3::hal::stm32f30x::{adc1, gpioa, gpioc, rcc};
 
-use f3::hal::stm32f30x::{self, GPIOA, GPIOD, GPIOE, RCC};
+use f3::hal::stm32f30x::{self, ADC1, GPIOA, GPIOD, GPIOE, RCC};
 
 pub struct Peripherals {
     pub gpioa: &'static gpioa::RegisterBlock,
     pub gpiod: &'static gpioc::RegisterBlock,
     pub gpioe: &'static gpioc::RegisterBlock,
     pub rcc: &'static rcc::RegisterBlock,
+    pub adc1: &'static adc1::RegisterBlock,
 }
 
 pub fn init() -> Peripherals {
@@ -22,6 +23,7 @@ pub fn init() -> Peripherals {
             gpiod: &*GPIOD::ptr(),
             gpioe: &*GPIOE::ptr(),
             rcc: &*RCC::ptr(),
+            adc1: &*ADC1::ptr(),
         }
     }
 }
diff --git a/src/main.rs b/src/main.rs
index 3d1390e..f204153 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -1,8 +1,10 @@
 #![no_main]
 #![no_std]
 
+// MCU is STM32F303VCT6
+//
 // Which GPIOs are free to use??
-// Rather, which are taken?
+// Rather, which are taken? FROM THE DISCOVERY PDF:
 // PA0  - AIN_1 with some filtering
 // PA2  - STLINK_TX
 // PA3  - STLINK_RX
@@ -54,6 +56,57 @@
 // PF1  - tied to PF1-OSC_OUT
 //
 // It looks like Port D is safe to use, most of port c  
+//
+// WHICH PINS CAN BE ROUTED TO THE ADC? (from the device data sheet)
+// PA0  - ADC1_IN1
+// PA1  - ADC1_IN2
+// PA2  - ADC1_IN3
+// PA3  - ADC1_IN4
+// PA4  - ADC2_IN1
+// PA5  - ADC2_IN2
+// PA6  - ADC2_IN3
+// PA7  - ADC2_IN4
+// PB0  - ADC3_IN12
+// PB1  - ADC3_IN1
+// PB2  - ADC2_IN12
+// PB12 - ADC4_IN3
+// PB13 - ADC3_IN5
+// PB14 - ADC4_IN4
+// PB15 - ADC4_IN5
+// PC0  - ADC12_IN6
+// PC1  - ADC12_IN7
+// PC2  - ADC12_IN8
+// PC3  - ADC12_IN9
+// PC4  - ADC2_IN5
+// PC5  - ADC2_IN11
+// PD8  - ADC4_IN12
+// PD9  - ADC4_IN12
+// PD10 - ADC34_IN7
+// PD11 - ADC34_IN8
+// PD12 - ADC34_IN8
+// PD12 - ADC34_IN9
+// PD13 - ADC34_IN10
+// PD14 - ADC34_IN11
+// PE7  - ADC3_IN13
+// PE9  - ADC3_IN2
+// PE10 - ADC3_IN14
+// PE11 - ADC3_IN15
+// PE12 - ADC3_IN16
+// PE13 - ADC3_IN3
+// PE14 - ADC4_IN1
+// PE15 - ADC4_IN2
+// PF2  - ADC12_IN10
+// PF4  - ADC1_IN5
+//
+// PC0-3 look safe to use as ADC. PF2,4 as well.
+//
+// ANALOG INPUT
+// from 11.3.2:
+// For the ADC, DAC, OPAMP, and COMP, configure the desired I/O in analog mode
+// in the GPIOx_MODER register and configure the required function in the ADC,
+// DAC, OPAMP, and COMP registers.
+//
+// Need to generate ADC12_CK or ADC34_CK from RCC. Or derived from AHB bus clock. See CKMODE[1:0] of the ADCx_CCR
 
 extern crate panic_itm; // panic handler
 
@@ -69,11 +122,13 @@ fn main() -> ! {
     // Configure clock gates
     per.rcc.ahbenr.modify(|_, w| {
         // enable IO Port A (push-button)
-        w.iopaen().set_bit();
+        w.iopaen().enabled();
         // enable IO Pord D (piezo)
-        w.iopden().set_bit();
+        w.iopden().enabled();
         // enable IO Port E (LEDs)
-        w.iopeen().set_bit()
+        w.iopeen().enabled();
+        // enable ADC 1/2
+        w.adc12en().enabled()
     });
 
     // All LEDS are outputs
@@ -111,6 +166,33 @@ fn main() -> ! {
         w.odr15().set_bit()
     });
 
+    // Enable the ADC voltage regulator. 15.3.6
+    // Note: by default ADC will be clocked off the bus clock, divided by two.
+    per.adc1.cr.modify(|_, w| {
+        w.deeppwd().clear_bit()
+    });
+    // Docs make it sound like this _must_ be two separate writes.
+    // "T ADCVREG_STUP
+    // "The software must wait for the startup time of the ADC voltage regulator
+    // (T ADCVREG_STUP ) before launching a calibration or enabling the ADC."
+    // 10 uS worst-case
+    // TODO: add delay
+    per.adc1.cr.modify(|_, w| {
+        w.advregen().set_bit()
+    });
+    // TODO: delay 10 uS before starting cal
+
+    // Calibrate the ADC
+    per.adc1.cr.modify(|_, w| {
+        w.adcal().set_bit()
+    });
+    // XXX we should probably loop until adcal is zero again, but meh.
+    
+    // TODO: set ADEN=1
+    // wait for ADRDY=1
+    // TODO: configure mux'ing: SQRx, JSQRx
+    // TODO: ADSTART=1
+
     bkpt();
 
     loop {