Flesh out ADC bringup (hangs!)

Currently hangs waiting for cal to complete, and then again waiting for
adrdy if we skip the cal.

Should check if _any_ of the writes go through.
This commit is contained in:
Colin 2019-09-28 14:02:37 -07:00
parent b73cb2fa1c
commit f3075706d7
1 changed files with 31 additions and 10 deletions

View File

@ -112,7 +112,7 @@ extern crate panic_itm; // panic handler
mod bsp;
use cortex_m::asm::bkpt;
use cortex_m::asm::{bkpt, delay};
use cortex_m_rt::entry;
#[entry]
@ -133,7 +133,6 @@ fn main() -> ! {
// All LEDS are outputs
per.gpioe.moder.modify(|_, w| {
// NB colin: there's also a .analog() mode!
w.moder8().output();
w.moder9().output();
w.moder10().output();
@ -144,9 +143,11 @@ fn main() -> ! {
w.moder15().output()
});
// Configure push-button as input:
// Configure push-button as input;
// Configure PA1 as analog-in
per.gpioa.moder.modify(|_, w| {
w.moder0().input()
.moder1().analog()
});
// Configure piezo as digital input
@ -176,22 +177,42 @@ fn main() -> ! {
// "The software must wait for the startup time of the ADC voltage regulator
// (T ADCVREG_STUP ) before launching a calibration or enabling the ADC."
// 10 uS worst-case
// TODO: add delay
delay(1000); // >= 10 us
bkpt();
per.adc1.cr.modify(|_, w| {
w.advregen().set_bit()
});
// TODO: delay 10 uS before starting cal
// Calibrate the ADC
// ADC CALIBRATION (15.3.8)
// 1. set ADCALDIF=0 (default)
// Start cal
per.adc1.cr.modify(|_, w| {
w.adcal().set_bit()
});
// XXX we should probably loop until adcal is zero again, but meh.
// Wait for done
while per.adc1.cr.read().adcal().bit() { }
// TODO: set ADEN=1
// Enable ADC (15.3.9)
per.adc1.cr.modify(|_, w| {
w.aden().set_bit()
});
// wait for ADRDY=1
// TODO: configure mux'ing: SQRx, JSQRx
// TODO: ADSTART=1
while per.adc1.isr.read().adrdy().bit_is_clear() { }
// Configure mux'ing: SQRx (regular conversion), JSQRx (injected conversion; don't use these)
// Draw from ADC1_IN2 -- PA1
per.adc1.sqr1.modify(|_, w| {
unsafe { w.sq1().bits(2) }
});
// Enable continuous mode (i.e. data will just continually appear in DR)
per.adc1.cfgr.modify(|_, w| {
w.cont().set_bit()
});
// Start ADC!
per.adc1.cr.modify(|_, w| {
w.adstart().set_bit()
});
bkpt();