Revert "arm64: Use FEAT_HAFDBS to track dirty pages when available"
This reverts commit 6cdf6b7a34
. This is
part of a series trying to make use of the arm64 hardware features for
tracking dirty pages. Unfortunately this series causes problems for the
AC5/AC5X SoCs. Having exhausted other options the consensus seems to be
reverting this series is the best course of action.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
This commit is contained in:
@@ -93,8 +93,6 @@ u64 get_tcr(u64 *pips, u64 *pva_bits)
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if (el == 1) {
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tcr = TCR_EL1_RSVD | (ips << 32) | TCR_EPD1_DISABLE;
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if (gd->arch.has_hafdbs)
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tcr |= TCR_HA | TCR_HD;
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} else if (el == 2) {
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tcr = TCR_EL2_RSVD | (ips << 16);
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} else {
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@@ -202,9 +200,6 @@ static void __cmo_on_leaves(void (*cmo_fn)(unsigned long, unsigned long),
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attrs != PTE_BLOCK_MEMTYPE(MT_NORMAL_NC))
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continue;
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if (gd->arch.has_hafdbs && (pte & (PTE_RDONLY | PTE_DBM)) != PTE_DBM)
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continue;
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end = va + BIT(level2shift(level)) - 1;
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/* No intersection with RAM? */
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@@ -353,9 +348,6 @@ static void add_map(struct mm_region *map)
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if (va_bits < 39)
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level = 1;
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if (gd->arch.has_hafdbs)
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attrs |= PTE_DBM | PTE_RDONLY;
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map_range(map->virt, map->phys, map->size, level,
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(u64 *)gd->arch.tlb_addr, attrs);
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}
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@@ -407,13 +399,7 @@ static int count_ranges(void)
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__weak u64 get_page_table_size(void)
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{
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u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64);
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u64 size, mmfr1;
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asm volatile("mrs %0, id_aa64mmfr1_el1" : "=r" (mmfr1));
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if ((mmfr1 & 0xf) == 2)
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gd->arch.has_hafdbs = true;
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else
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gd->arch.has_hafdbs = false;
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u64 size;
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/* Account for all page tables we would need to cover our memory map */
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size = one_pt * count_ranges();
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@@ -49,13 +49,10 @@
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#define PTE_TYPE_BLOCK (1 << 0)
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#define PTE_TYPE_VALID (1 << 0)
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#define PTE_RDONLY BIT(7)
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#define PTE_DBM BIT(51)
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#define PTE_TABLE_PXN BIT(59)
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#define PTE_TABLE_XN BIT(60)
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#define PTE_TABLE_AP BIT(61)
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#define PTE_TABLE_NS BIT(63)
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#define PTE_TABLE_PXN (1UL << 59)
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#define PTE_TABLE_XN (1UL << 60)
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#define PTE_TABLE_AP (1UL << 61)
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#define PTE_TABLE_NS (1UL << 63)
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/*
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* Block
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@@ -102,9 +99,6 @@
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#define TCR_TG0_16K (2 << 14)
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#define TCR_EPD1_DISABLE (1 << 23)
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#define TCR_HA BIT(39)
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#define TCR_HD BIT(40)
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#define TCR_EL1_RSVD (1U << 31)
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#define TCR_EL2_RSVD (1U << 31 | 1 << 23)
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#define TCR_EL3_RSVD (1U << 31 | 1 << 23)
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@@ -52,7 +52,6 @@ struct arch_global_data {
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#if defined(CONFIG_ARM64)
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unsigned long tlb_fillptr;
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unsigned long tlb_emerg;
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bool has_hafdbs;
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#endif
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#endif
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#ifdef CFG_SYS_MEM_RESERVE_SECURE
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