arm: mach-k3: j721e: Move booting of Main R5FSS Core0 to A72 U-Boot
The Main R5FSS Core0 on J721E SoCs is originally booted from R5 SPL itself to achieve certain product-level early-boot metrics. This is no longer supported after the R5 SPL re-architecture (support merged for v2021.10-rc1). Move the booting of this core altogether from R5 SPL to A72 U-Boot. The env variables are left as is for now, and will be cleaned up in a subsequent patch. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210726211311.5977-2-s-anna@ti.com
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@@ -377,7 +377,11 @@ void start_non_linux_remote_cores(void)
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int size = 0, ret;
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u32 loadaddr = 0;
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if (!soc_is_j721e())
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/*
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* Skip booting of Main R5FSS Core0 in R5 SPL. This is no longer
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* supported after the R5 SPL re-architecture.
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*/
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if (soc_is_j721e() || soc_is_j7200())
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return;
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size = load_firmware("name_mainr5f0_0fw", "addr_mainr5f0_0load",
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@@ -129,6 +129,7 @@
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#ifdef CONFIG_TARGET_J721E_A72_EVM
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#define DEFAULT_RPROCS "" \
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"2 /lib/firmware/j7-main-r5f0_0-fw " \
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"3 /lib/firmware/j7-main-r5f0_1-fw " \
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"4 /lib/firmware/j7-main-r5f1_0-fw " \
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"5 /lib/firmware/j7-main-r5f1_1-fw " \
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