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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

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This commit is contained in:
Tom Rini
2014-04-25 14:53:51 -04:00
parent adcdeacc3e 08ad9b068a
commit 080d897585
137 changed files with 5781 additions and 1559 deletions
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36
doc/README.b4860qds
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@@ -328,3 +328,39 @@ The below commands apply to both B4860QDS and B4420QDS.
On Linux the interfaces are renamed as:
. eth2 -> fm1-gb2
. eth3 -> fm1-gb3
NAND boot with 2 Stage boot loader
----------------------------------
PBL initialise the internal SRAM and copy SPL(160KB) in SRAM.
SPL further initialise DDR using SPD and environment variables and copy
u-boot(768 KB) from flash to DDR.
Finally SPL transer control to u-boot for futher booting.
SPL has following features:
- Executes within 256K
- No relocation required
Run time view of SPL framework during boot :-
-----------------------------------------------
Area | Address |
-----------------------------------------------
Secure boot | 0xFFFC0000 (32KB) |
headers | |
-----------------------------------------------
GD, BD | 0xFFFC8000 (4KB) |
-----------------------------------------------
ENV | 0xFFFC9000 (8KB) |
-----------------------------------------------
HEAP | 0xFFFCB000 (30KB) |
-----------------------------------------------
STACK | 0xFFFD8000 (22KB) |
-----------------------------------------------
U-boot SPL | 0xFFFD8000 (160KB) |
-----------------------------------------------
NAND Flash memory Map on B4860 and B4420QDS
------------------------------------------
Start End Definition Size
0x000000 0x0FFFFF u-boot 1MB
0x140000 0x15FFFF u-boot env 128KB
0x1A0000 0x1BFFFF FMAN Ucode 128KB

53
doc/README.t4240qds
View File

@@ -120,3 +120,56 @@ The override voltage takes effect when booting.
Note: voltage adjustment needs to be done step by step. Changing voltage too
rapidly may cause current surge. The voltage stepping is done by software.
Users can set the final voltage directly.
2-stage NAND/SD boot loader
-------------------------------
PBL initializes the internal SRAM and copy SPL(160K) in SRAM.
SPL further initialise DDR using SPD and environment variables
and copy u-boot(768 KB) from NAND/SD device to DDR.
Finally SPL transers control to u-boot for futher booting.
SPL has following features:
- Executes within 256K
- No relocation required
Run time view of SPL framework
-------------------------------------------------
|Area | Address |
-------------------------------------------------
|SecureBoot header | 0xFFFC0000 (32KB) |
-------------------------------------------------
|GD, BD | 0xFFFC8000 (4KB) |
-------------------------------------------------
|ENV | 0xFFFC9000 (8KB) |
-------------------------------------------------
|HEAP | 0xFFFCB000 (50KB) |
-------------------------------------------------
|STACK | 0xFFFD8000 (22KB) |
-------------------------------------------------
|U-boot SPL | 0xFFFD8000 (160KB) |
-------------------------------------------------
NAND Flash memory Map on T4QDS
--------------------------------------------------------------
Start End Definition Size
0x000000 0x0FFFFF u-boot img 1MB
0x140000 0x15FFFF u-boot env 128KB
0x160000 0x17FFFF FMAN Ucode 128KB
Micro SD Card memory Map on T4QDS
----------------------------------------------------
Block #blocks Definition Size
0x008 2048 u-boot img 1MB
0x800 0016 u-boot env 8KB
0x820 0128 FMAN ucode 64KB
Switch Settings: (ON is 1, OFF is 0)
===============
NAND boot SW setting:
SW1[1:8] = 10000010
SW2[1.1] = 0
SW6[1:4] = 1001
SD boot SW setting:
SW1[1:8] = 00100000
SW2[1.1] = 0