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arm64: dts: rockchip: Simplify network PHY connection on qnap-ts433

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While it requires to have the right phy driver loaded (i.e. motorcomm)
to make the phy asserting the right delays, this is generally the
preferred way to define the MAC <-> PHY connection.

Signed-off-by: Uwe Kleine-König <ukleinek@debian.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20240304084612.711678-2-ukleinek@debian.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: e8d45544f806f3b55c30345de84262cbb9504902 ]

(cherry picked from commit e0bbe061fd537bd7b113c53eb046bbcbf0e6597d)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Uwe Kleine-König
2024-10-28 20:00:31 +01:00
committed by Kever Yang
parent 9a7b1d8cdc
commit 16e78f2a64
1 changed files with 1 additions and 3 deletions
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4
dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts
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@@ -198,15 +198,13 @@
assigned-clock-rates = <0>, <125000000>; assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output"; clock_in_out = "output";
phy-handle = <&rgmii_phy0>; phy-handle = <&rgmii_phy0>;
phy-mode = "rgmii"; phy-mode = "rgmii-id";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2 &gmac0_tx_bus2
&gmac0_rx_bus2 &gmac0_rx_bus2
&gmac0_rgmii_clk &gmac0_rgmii_clk
&gmac0_rgmii_bus>; &gmac0_rgmii_bus>;
rx_delay = <0x2f>;
tx_delay = <0x3c>;
status = "okay"; status = "okay";
}; };