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net: mediatek: add support for XGMII interface

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This patch add XGMII support for connecting 2.5G PHY.

Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This commit is contained in:
Weijie Gao
2024-01-22 10:08:16 +08:00
committed by Tom Rini
parent 85d1968e75
commit 172e32add3
2 changed files with 15 additions and 9 deletions
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22
drivers/net/mtk_eth.c
View File

@@ -1246,7 +1246,8 @@ static int mtk_phy_start(struct mtk_eth_priv *priv)
} }
if (!priv->force_mode) { if (!priv->force_mode) {
if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII) if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII ||
priv->phy_interface == PHY_INTERFACE_MODE_XGMII)
mtk_xphy_link_adjust(priv); mtk_xphy_link_adjust(priv);
else else
mtk_phy_link_adjust(priv); mtk_phy_link_adjust(priv);
@@ -1516,7 +1517,7 @@ static void mtk_mac_init(struct mtk_eth_priv *priv)
static void mtk_xmac_init(struct mtk_eth_priv *priv) static void mtk_xmac_init(struct mtk_eth_priv *priv)
{ {
u32 sts; u32 force_link = 0;
switch (priv->phy_interface) { switch (priv->phy_interface) {
case PHY_INTERFACE_MODE_USXGMII: case PHY_INTERFACE_MODE_USXGMII:
@@ -1531,15 +1532,19 @@ static void mtk_xmac_init(struct mtk_eth_priv *priv)
SYSCFG0_GE_MODE_M << SYSCFG0_GE_MODE_S(priv->gmac_id), SYSCFG0_GE_MODE_M << SYSCFG0_GE_MODE_S(priv->gmac_id),
0); 0);
if (priv->gmac_id == 1) { if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII &&
priv->gmac_id == 1) {
mtk_infra_rmw(priv, TOPMISC_NETSYS_PCS_MUX, mtk_infra_rmw(priv, TOPMISC_NETSYS_PCS_MUX,
NETSYS_PCS_MUX_MASK, MUX_G2_USXGMII_SEL); NETSYS_PCS_MUX_MASK, MUX_G2_USXGMII_SEL);
} else if (priv->gmac_id == 2) {
sts = mtk_gmac_read(priv, XGMAC_STS(priv->gmac_id));
sts |= XGMAC_FORCE_LINK;
mtk_gmac_write(priv, XGMAC_STS(priv->gmac_id), sts);
} }
if (priv->phy_interface == PHY_INTERFACE_MODE_XGMII ||
priv->gmac_id == 2)
force_link = XGMAC_FORCE_LINK(priv->gmac_id);
mtk_gmac_rmw(priv, XGMAC_STS(priv->gmac_id),
XGMAC_FORCE_LINK(priv->gmac_id), force_link);
/* Force GMAC link down */ /* Force GMAC link down */
mtk_gmac_write(priv, GMAC_PORT_MCR(priv->gmac_id), FORCE_MODE); mtk_gmac_write(priv, GMAC_PORT_MCR(priv->gmac_id), FORCE_MODE);
} }
@@ -1828,7 +1833,8 @@ static int mtk_eth_probe(struct udevice *dev)
mtk_eth_mdc_init(priv); mtk_eth_mdc_init(priv);
/* Set MAC mode */ /* Set MAC mode */
if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII) if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII ||
priv->phy_interface == PHY_INTERFACE_MODE_XGMII)
mtk_xmac_init(priv); mtk_xmac_init(priv);
else else
mtk_mac_init(priv); mtk_mac_init(priv);

2
drivers/net/mtk_eth.h
View File

@@ -268,7 +268,7 @@ enum mkt_eth_capabilities {
/* XGMAC Status Registers */ /* XGMAC Status Registers */
#define XGMAC_STS(x) (((x) == 2) ? 0x001C : 0x000C) #define XGMAC_STS(x) (((x) == 2) ? 0x001C : 0x000C)
#define XGMAC_FORCE_LINK BIT(15) #define XGMAC_FORCE_LINK(x) (((x) == 1) ? BIT(31) : BIT(15))
/* XGMAC Registers */ /* XGMAC Registers */
#define XGMAC_PORT_MCR(x) (0x2000 + (((x) - 1) * 0x1000)) #define XGMAC_PORT_MCR(x) (0x2000 + (((x) - 1) * 0x1000))