arch: arm: dts: Enable kernel itb file generation for Agilex5 SoCFPGA

Load and entry addresses are corrected for Agilex5 SoCFPGA board
which would enable to generate the kernel itb file with the right
addresses.

Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
This commit is contained in:
Naresh Kumar Ravulapalli
2025-03-03 21:06:43 -08:00
committed by Tien Fong Chee
parent d13b1bbbde
commit 1aa1022780

View File

@@ -106,8 +106,13 @@
arch = "arm64"; arch = "arm64";
os = "linux"; os = "linux";
compression = "none"; compression = "none";
#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
load = <0x86000000>;
entry = <0x86000000>;
#else
load = <0x6000000>; load = <0x6000000>;
entry = <0x6000000>; entry = <0x6000000>;
#endif
kernel_blob: blob-ext { kernel_blob: blob-ext {
filename = "Image"; filename = "Image";
}; };