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lx2160aqds : Add support for LX2160AQDS platform

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LX2160AQDS is a development board that supports LX2160A
family SoCs. This patch add base support for this board.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
[PK: Sqaush patch for "secure boot defconfig" & add maintainer]
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
This commit is contained in:
Pankaj Bansal
2019-02-08 10:29:58 +00:00
committed by Prabhakar Kushwaha
parent edc975b8aa
commit 1eba723c72
14 changed files with 1526 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm/Kconfig
View File

@@ -1096,6 +1096,19 @@ config TARGET_LX2160ARDB
is a high-performance development platform that supports the
QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
config TARGET_LX2160AQDS
bool "Support lx2160aqds"
select ARCH_LX2160A
select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
help
Support for NXP LX2160AQDS platform.
The lx2160aqds (LX2160A QorIQ Development System (QDS)
is a high-performance development platform that supports the
QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
config TARGET_HIKEY
bool "Support HiKey 96boards Consumer Edition Platform"
select ARM64

1
arch/arm/cpu/armv8/Kconfig
View File

@@ -107,6 +107,7 @@ config PSCI_RESET
!TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \
!TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
!TARGET_LS2081ARDB && !TARGET_LX2160ARDB && \
!TARGET_LX2160AQDS && \
!ARCH_UNIPHIER && !TARGET_S32V234EVB
help
Most armv8 systems have PSCI support enabled in EL3, either through

3
arch/arm/dts/Makefile
View File

@@ -247,7 +247,8 @@ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
fsl-ls2088a-rdb-qspi.dtb \
fsl-ls1088a-rdb.dtb \
fsl-ls1088a-qds.dtb \
fsl-lx2160a-rdb.dtb
fsl-lx2160a-rdb.dtb \
fsl-lx2160a-qds.dtb
dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1043a-qds-lpuart.dtb \
fsl-ls1043a-rdb.dtb \

17
arch/arm/dts/fsl-lx2160a-qds.dts Normal file
View File

@@ -0,0 +1,17 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* NXP LX2160AQDS device tree source
*
* Copyright 2018-2019 NXP
*
*/
/dts-v1/;
#include "fsl-lx2160a.dtsi"
/ {
model = "NXP Layerscape LX2160AQDS Board";
compatible = "fsl,lx2160aqds", "fsl,lx2160a";
};

10
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
View File

@@ -2,7 +2,7 @@
/*
* LayerScape Internal Memory Map
*
* Copyright 2017-2018 NXP
* Copyright 2017-2019 NXP
* Copyright 2014 Freescale Semiconductor, Inc.
*/
@@ -350,6 +350,14 @@ struct ccsr_gur {
#define FSL_CHASSIS3_SRDS1_REGSR 29
#define FSL_CHASSIS3_SRDS2_REGSR 29
#define FSL_CHASSIS3_SRDS3_REGSR 29
#define FSL_CHASSIS3_RCWSR12_REGSR 12
#define FSL_CHASSIS3_RCWSR13_REGSR 13
#define FSL_CHASSIS3_SDHC1_BASE_PMUX_MASK 0x07000000
#define FSL_CHASSIS3_SDHC1_BASE_PMUX_SHIFT 24
#define FSL_CHASSIS3_SDHC2_BASE_PMUX_MASK 0x00000038
#define FSL_CHASSIS3_SDHC2_BASE_PMUX_SHIFT 3
#define FSL_CHASSIS3_IIC5_PMUX_MASK 0x00000E00
#define FSL_CHASSIS3_IIC5_PMUX_SHIFT 9
#elif defined(CONFIG_ARCH_LS1088A)
#define FSL_CHASSIS3_EC1_REGSR 26
#define FSL_CHASSIS3_EC2_REGSR 26