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ddr: marvell: a38x: Allow boards to specify CK_DELAY parameter

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For some layouts it is necessary to adjust the CK_DELAY parameter to
successfully complete DDR training. Add the ability to specify the
CK_DELAY in the mv_ddr_topology_map.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
This commit is contained in:
Chris Packham
2020-01-30 12:50:44 +13:00
committed by Stefan Roese
parent 8914831860
commit 236609d93c
5 changed files with 24 additions and 1 deletions
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5
drivers/ddr/marvell/a38x/ddr3_init.c
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@@ -106,8 +106,10 @@ static int mv_ddr_training_params_set(u8 dev_num)
struct tune_train_params params;
int status;
u32 cs_num;
int ck_delay;
cs_num = mv_ddr_cs_num_get();
ck_delay = mv_ddr_ck_delay_get();
/* NOTE: do not remove any field initilization */
params.ck_delay = TUNE_TRAINING_PARAMS_CK_DELAY;
@@ -131,6 +133,9 @@ static int mv_ddr_training_params_set(u8 dev_num)
params.g_odt_config = TUNE_TRAINING_PARAMS_ODT_CONFIG_2CS;
}
if (ck_delay > 0)
params.ck_delay = ck_delay;
status = ddr3_tip_tune_training_params(dev_num, &params);
if (MV_OK != status) {
printf("%s Training Sequence - FAILED\n", ddr_type);