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spi: cadence_qspi: Enable apb linear mode for apb read & write operations

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On versal platform, enable apb linear mode for apb read and write
execute operations amd disable it when using dma reads. This is done by
xilinx_pm_request() secure calls when CONFIG_ZYNQMP_FIRMWARE is enabled,
else we use direct raw reads and writes in case of mini U-Boot.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-5-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
T Karthik Reddy
2022-05-12 04:05:34 -06:00
committed by Michal Simek
parent bf8dae5fcf
commit 248fe9f302
6 changed files with 54 additions and 0 deletions
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7
include/zynqmp_firmware.h
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@@ -160,6 +160,12 @@ enum dll_reset_type {
PM_DLL_RESET_PULSE = 2,
};
enum ospi_mux_select_type {
PM_OSPI_MUX_SEL_DMA,
PM_OSPI_MUX_SEL_LINEAR,
PM_OSPI_MUX_GET_MODE,
};
enum pm_query_id {
PM_QID_INVALID = 0,
PM_QID_CLOCK_GET_NAME = 1,
@@ -427,6 +433,7 @@ enum pm_gem_config_type {
#define ZYNQMP_PM_VERSION_INVALID ~0
#define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
#define PMIO_NODE_ID_BASE 0x1410801B
#define PMIO_NODE_ID_BASE 0x1410801B