board: lg: star: add Optimus 2X P990 support
The LG Optimus 2X is a touchscreen-based, slate-sized smartphone designed and manufactured by LG that runs the Android operating system. The Optimus 2X features a 4" WVGA display, an Nvidia Tegra 2 dual-core chip, 512 MB of RAM and extendable 8 GB of internal storage. UART-B is default debug port. Tested-by: Ion Agorria <ion@agorria.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
This commit is contained in:
Svyatoslav Ryhel
@@ -86,6 +86,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += \
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tegra20-asus-tf101.dtb \
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tegra20-asus-tf101g.dtb \
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tegra20-harmony.dtb \
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tegra20-lg-star.dtb \
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tegra20-medcom-wide.dtb \
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tegra20-motorola-daytona.dtb \
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tegra20-motorola-olympus.dtb \
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538
arch/arm/dts/tegra20-lg-star.dts
Normal file
538
arch/arm/dts/tegra20-lg-star.dts
Normal file
@@ -0,0 +1,538 @@
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// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include "tegra20.dtsi"
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/ {
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model = "LG Optimus 2X (P990)";
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compatible = "lg,star", "nvidia,tegra20";
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chosen {
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stdout-path = &uartb;
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};
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aliases {
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i2c0 = &pwr_i2c;
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i2c5 = &dcdc_i2c;
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mmc0 = &sdmmc4; /* eMMC */
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mmc1 = &sdmmc3; /* uSD slot */
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rtc0 = &pmic;
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rtc1 = "/rtc@7000e000";
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usb0 = µ_usb;
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* 512 MB */
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};
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host1x@50000000 {
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dc@54200000 {
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rgb {
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status = "okay";
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port {
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dpi_output: endpoint {
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remote-endpoint = <&bridge_input>;
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bus-width = <24>;
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};
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};
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};
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};
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};
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pinmux@70000014 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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crt {
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nvidia,pins = "crtp";
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nvidia,function = "crt";
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};
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dap1 {
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nvidia,pins = "dap1";
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nvidia,function = "dap1";
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};
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dap2 {
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nvidia,pins = "dap2";
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nvidia,function = "dap2";
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};
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dap3 {
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nvidia,pins = "dap3";
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nvidia,function = "dap3";
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};
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dap4 {
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nvidia,pins = "dap4";
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nvidia,function = "dap4";
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};
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displaya {
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nvidia,pins = "lcsn", "ld0", "ld1", "ld10",
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"ld11", "ld12", "ld13", "ld14",
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"ld15", "ld16", "ld17", "ld2",
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"ld3", "ld4", "ld5", "ld6",
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"ld7", "ld8", "ld9", "ldc",
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"ldi", "lhp0", "lhp1", "lhp2",
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"lhs", "lm0", "lm1", "lpp",
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"lpw0", "lpw1", "lpw2", "lsc0",
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"lsc1", "lsck", "lsda", "lsdi",
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"lspi", "lvp0", "lvp1", "lvs";
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nvidia,function = "displaya";
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};
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gmi {
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nvidia,pins = "ata", "atc", "atd", "ate",
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"gmb", "irrx", "irtx";
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nvidia,function = "gmi";
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};
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hdmi {
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nvidia,pins = "hdint";
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nvidia,function = "hdmi";
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};
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i2c {
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nvidia,pins = "i2cp", "rm";
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nvidia,function = "i2c";
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};
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i2c2 {
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nvidia,pins = "pta";
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nvidia,function = "i2c2";
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};
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i2c3 {
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nvidia,pins = "dtf";
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nvidia,function = "i2c3";
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};
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kbc {
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nvidia,pins = "kbca", "kbcb", "kbcc", "kbce",
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"kbcf";
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nvidia,function = "kbc";
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};
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owr {
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nvidia,pins = "owc";
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nvidia,function = "owr";
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};
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plla-out {
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nvidia,pins = "cdev1";
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nvidia,function = "plla_out";
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};
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pllp-out4 {
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nvidia,pins = "cdev2";
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nvidia,function = "pllp_out4";
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};
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pwm {
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nvidia,pins = "gpu";
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nvidia,function = "pwm";
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};
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pwr-on {
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nvidia,pins = "pmc";
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nvidia,function = "pwr_on";
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};
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rtck {
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nvidia,pins = "gpu7";
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nvidia,function = "rtck";
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};
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sdio1 {
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nvidia,pins = "sdio1";
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nvidia,function = "sdio1";
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};
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sdio2 {
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nvidia,pins = "kbcd";
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nvidia,function = "sdio2";
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};
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sdio3 {
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nvidia,pins = "sdb", "sdc", "sdd", "slxa",
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"slxd", "slxk", "slxc";
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nvidia,function = "sdio3";
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};
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sdio4 {
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nvidia,pins = "atb", "gma", "gme";
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nvidia,function = "sdio4";
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};
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spi1 {
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nvidia,pins = "uda";
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nvidia,function = "spi1";
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};
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spi2 {
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nvidia,pins = "spia", "spib", "spic";
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nvidia,function = "spi2";
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};
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spi2-alt {
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nvidia,pins = "spid", "spie", "spig", "spih";
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nvidia,function = "spi2_alt";
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};
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uarta {
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nvidia,pins = "uaa", "uab";
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nvidia,function = "uarta";
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};
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uartc {
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nvidia,pins = "uca", "ucb";
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nvidia,function = "uartc";
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};
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uartd {
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nvidia,pins = "gmc";
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nvidia,function = "uartd";
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};
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vi {
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nvidia,pins = "dtc", "dtd";
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nvidia,function = "vi";
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};
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vi-sensor-clk {
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nvidia,pins = "csus";
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nvidia,function = "vi_sensor_clk";
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};
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conf-lsda {
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nvidia,pins = "lsda", "owc";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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conf-ata {
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nvidia,pins = "ata", "dtf", "gmb", "gmc",
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"i2cp", "irrx", "kbca", "kbcc",
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"kbcd", "kbce", "kbcf", "lcsn",
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"ldc", "pta", "rm", "sdc",
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"sdd", "spie", "spif", "spig",
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"spih", "uaa", "uad", "uca",
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"ucb", "pmce";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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conf-crtp {
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nvidia,pins = "crtp", "gpv", "hdint", "lhs",
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"lm0", "lpw0", "lpw1", "lpw2",
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"lsc1", "lsck", "lspi", "lvs",
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"slxa", "slxd", "spdi";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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conf-atb {
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nvidia,pins = "atb", "atc", "atd", "ate",
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"cdev1", "cdev2", "csus", "dap1",
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"dap2", "dap3", "dap4", "ddc",
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"dta", "dtb", "dte", "gma",
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"gmd", "gme", "gpu", "gpu7",
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"irtx", "kbcb", "lm1", "lsc0",
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"lsdi", "lvp0", "pmc", "sdb",
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"sdio1", "slxc", "spdo", "spia",
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"spib", "spic", "uab", "uac",
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"uda", "ck32", "ddrc", "pmca",
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"pmcb", "pmcc", "pmcd", "xm2c",
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"xm2d";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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conf-dtc {
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nvidia,pins = "dtc", "dtd";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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conf-ld0 {
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nvidia,pins = "ld0", "ld1", "ld2", "ld3",
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"ld4", "ld5", "ld6", "ld7",
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"ld8", "ld9", "ld10", "ld11",
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"ld12", "ld13", "ld14", "ld15",
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"ld16", "ld17", "ldi", "lhp0",
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"lhp1", "lhp2", "lpp", "lvp1",
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"slxk", "spid";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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drive-sdio1 {
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nvidia,pins = "drive_sdio1", "drive_vi1";
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nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
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nvidia,schmitt = <TEGRA_PIN_ENABLE>;
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nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
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nvidia,pull-down-strength = <31>;
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nvidia,pull-up-strength = <31>;
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nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
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nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
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};
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drive-i2c {
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nvidia,pins = "drive_dbg", "drive_ddc", "drive_at1",
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"drive_vi2", "drive_ao1";
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nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
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nvidia,schmitt = <TEGRA_PIN_ENABLE>;
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nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
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nvidia,pull-down-strength = <31>;
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nvidia,pull-up-strength = <31>;
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nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
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nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
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};
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drive-dap {
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nvidia,pins = "drive_dap2", "drive_dap3";
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nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
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nvidia,schmitt = <TEGRA_PIN_ENABLE>;
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nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
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nvidia,pull-down-strength = <46>;
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nvidia,pull-up-strength = <46>;
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nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
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nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
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};
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};
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};
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uartb: serial@70006040 {
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clocks = <&tegra_car 7>;
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status = "okay";
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};
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pwr_i2c: i2c@7000d000 {
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status = "okay";
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clock-frequency = <400000>;
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pmic: max8907@3c {
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compatible = "maxim,max8907";
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reg = <0x3c>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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interrupt-controller;
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#gpio-cells = <2>;
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gpio-controller;
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maxim,system-power-controller;
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regulators {
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vdd_1v8_vio: sd3 {
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regulator-name = "vcc_1v8_io";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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iovcc_1v8_lcd: ldo3 {
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regulator-name = "vcc_1v8_lcd";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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};
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avdd_3v3_usb: ldo4 {
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regulator-name = "avdd_3v3_usb";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcore_emmc: ldo5 {
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regulator-name = "vcc_2v8_emmc";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-boot-on;
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};
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vdd_usd: ldo12 {
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regulator-name = "vcc_2v8_sdio";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-boot-on;
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};
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vcc_2v8_lcd: ldo14 {
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regulator-name = "vcc_2v8_lcd";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-boot-on;
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};
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};
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};
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};
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dcdc_i2c: i2c-5 {
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compatible = "i2c-gpio";
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||||
sda-gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
|
||||
scl-gpios = <&gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_HIGH>;
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i2c-gpio,delay-us = <5>;
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i2c-gpio,timeout-ms = <100>;
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#address-cells = <1>;
|
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#size-cells = <0>;
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|
||||
aat2870: led-controller@60 {
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compatible = "skyworks,aat2870";
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reg = <0x60>;
|
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enable-gpios = <&gpio TEGRA_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
|
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|
||||
backlight {
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||||
current-max-microamp = <27900000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
micro_usb: usb@c5000000 {
|
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status = "okay";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
|
||||
usb-phy@c5000000 {
|
||||
status = "okay";
|
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vbus-supply = <&avdd_3v3_usb>;
|
||||
};
|
||||
|
||||
sdmmc3: sdhci@c8000400 {
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
|
||||
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
|
||||
|
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vmmc-supply = <&vdd_usd>;
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||||
vqmmc-supply = <&vdd_1v8_vio>;
|
||||
};
|
||||
|
||||
sdmmc4: sdhci@c8000600 {
|
||||
status = "okay";
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
|
||||
vmmc-supply = <&vcore_emmc>;
|
||||
vqmmc-supply = <&vdd_1v8_vio>;
|
||||
};
|
||||
|
||||
/* 32KHz oscillator which is used by PMC */
|
||||
clk32k_in: clock-32k-in {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
clock-output-names = "ref-oscillator";
|
||||
};
|
||||
|
||||
bridge: cpu-bridge {
|
||||
compatible = "nvidia,tegra-8bit-cpu";
|
||||
|
||||
dc-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_HIGH>;
|
||||
rw-gpios = <&gpio TEGRA_GPIO(B, 3) GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
|
||||
|
||||
data-gpios = <&gpio TEGRA_GPIO(E, 0) GPIO_ACTIVE_HIGH>,
|
||||
<&gpio TEGRA_GPIO(E, 1) GPIO_ACTIVE_HIGH>,
|
||||
<&gpio TEGRA_GPIO(E, 2) GPIO_ACTIVE_HIGH>,
|
||||
<&gpio TEGRA_GPIO(E, 3) GPIO_ACTIVE_HIGH>,
|
||||
<&gpio TEGRA_GPIO(E, 4) GPIO_ACTIVE_HIGH>,
|
||||
<&gpio TEGRA_GPIO(E, 5) GPIO_ACTIVE_HIGH>,
|
||||
<&gpio TEGRA_GPIO(E, 6) GPIO_ACTIVE_HIGH>,
|
||||
<&gpio TEGRA_GPIO(E, 7) GPIO_ACTIVE_HIGH>;
|
||||
|
||||
nvidia,init-sequence = <0x0000002c 0x0 0x0 0x00005000>;
|
||||
|
||||
panel {
|
||||
/*
|
||||
* There are 2 rev of P990. One has Hitachi TX10D07VM0BAA
|
||||
* panel and other has LG LH400WV3-SD04 panel. We are using
|
||||
* Hitachi here but it is dynamically adjusted for the
|
||||
* correct compatible.
|
||||
*/
|
||||
compatible = "hit,tx10d07vm0baa";
|
||||
|
||||
reset-gpios = <&gpio TEGRA_GPIO(V, 7) GPIO_ACTIVE_LOW>;
|
||||
|
||||
avci-supply = <&vcc_2v8_lcd>;
|
||||
iovcc-supply = <&iovcc_1v8_lcd>;
|
||||
|
||||
backlight = <&aat2870>;
|
||||
|
||||
port {
|
||||
panel_input: endpoint {
|
||||
remote-endpoint = <&bridge_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
bridge_input: endpoint {
|
||||
remote-endpoint = <&dpi_output>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
bridge_output: endpoint {
|
||||
remote-endpoint = <&panel_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
key-power {
|
||||
label = "Power";
|
||||
gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_ENTER>;
|
||||
};
|
||||
|
||||
key-volume-up {
|
||||
label = "Volume Up";
|
||||
gpios = <&gpio TEGRA_GPIO(G, 1) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_UP>;
|
||||
};
|
||||
|
||||
key-volume-down {
|
||||
label = "Volume Down";
|
||||
gpios = <&gpio TEGRA_GPIO(G, 0) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_DOWN>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_3v3_vbat: regulator-vbat {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_vbat";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
@@ -54,6 +54,10 @@ config TARGET_SEABOARD
|
||||
select TEGRA_LP0
|
||||
select TEGRA_PMU
|
||||
|
||||
config TARGET_STAR
|
||||
bool "LG Tegra20 Star board"
|
||||
select BOARD_LATE_INIT
|
||||
|
||||
config TARGET_TEC
|
||||
bool "Avionic Design Tamonten Evaluation Carrier"
|
||||
select BOARD_LATE_INIT
|
||||
@@ -88,6 +92,7 @@ source "board/compal/paz00/Kconfig"
|
||||
source "board/acer/picasso/Kconfig"
|
||||
source "board/avionic-design/plutux/Kconfig"
|
||||
source "board/nvidia/seaboard/Kconfig"
|
||||
source "board/lg/star/Kconfig"
|
||||
source "board/avionic-design/tec/Kconfig"
|
||||
source "board/asus/transformer-t20/Kconfig"
|
||||
source "board/compulab/trimslice/Kconfig"
|
||||
|
||||
16
board/lg/star/Kconfig
Normal file
16
board/lg/star/Kconfig
Normal file
@@ -0,0 +1,16 @@
|
||||
if TARGET_STAR
|
||||
|
||||
config SYS_BOARD
|
||||
default "star"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "lg"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "tegra"
|
||||
|
||||
config TEGRA_BOARD_STRING
|
||||
string "Default Tegra board name"
|
||||
default "LG Star"
|
||||
|
||||
endif
|
||||
7
board/lg/star/MAINTAINERS
Normal file
7
board/lg/star/MAINTAINERS
Normal file
@@ -0,0 +1,7 @@
|
||||
STAR BOARD
|
||||
M: Svyatoslav Ryhel <clamor95@gmail.com>
|
||||
S: Maintained
|
||||
F: arch/arm/dts/tegra20-lg-star.dts
|
||||
F: board/lg/star/
|
||||
F: configs/star_defconfig
|
||||
F: doc/board/lg/star.rst
|
||||
9
board/lg/star/Makefile
Normal file
9
board/lg/star/Makefile
Normal file
@@ -0,0 +1,9 @@
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
# (C) Copyright 2010-2012
|
||||
# NVIDIA Corporation <www.nvidia.com>
|
||||
#
|
||||
# (C) Copyright 2024
|
||||
# Svyatoslav Ryhel <clamor95@gmail.com>
|
||||
|
||||
obj-y += star.o
|
||||
50
board/lg/star/star.c
Normal file
50
board/lg/star/star.c
Normal file
@@ -0,0 +1,50 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* (C) Copyright 2023
|
||||
* Svyatoslav Ryhel <clamor95@gmail.com>
|
||||
*/
|
||||
|
||||
#include <dm.h>
|
||||
#include <dm/root.h>
|
||||
#include <fdt_support.h>
|
||||
#include <log.h>
|
||||
#include <spl_gpio.h>
|
||||
|
||||
static int star_fix_panel(void *fdt)
|
||||
{
|
||||
int panel_offset, ret;
|
||||
|
||||
/* Patch panel compatible */
|
||||
spl_gpio_input(NULL, TEGRA_GPIO(J, 5));
|
||||
if (spl_gpio_get_value(NULL, TEGRA_GPIO(J, 5))) {
|
||||
panel_offset = fdt_node_offset_by_compatible(fdt, -1,
|
||||
"hit,tx10d07vm0baa");
|
||||
if (panel_offset < 0) {
|
||||
log_debug("%s: panel node not found\n", __func__);
|
||||
return panel_offset;
|
||||
}
|
||||
|
||||
ret = fdt_setprop_string(fdt, panel_offset, "compatible",
|
||||
"lg,lh400wv3-sd04");
|
||||
if (ret) {
|
||||
log_debug("%s: panel comapible patch failed\n", __func__);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void pinmux_init(void)
|
||||
{
|
||||
void *fdt = (void *)gd->fdt_blob;
|
||||
|
||||
star_fix_panel(fdt);
|
||||
}
|
||||
|
||||
#if IS_ENABLED(CONFIG_OF_LIBFDT) && IS_ENABLED(CONFIG_OF_BOARD_SETUP)
|
||||
int ft_board_setup(void *fdt, struct bd_info *bd)
|
||||
{
|
||||
return star_fix_panel(fdt);
|
||||
}
|
||||
#endif
|
||||
15
board/lg/star/star.env
Normal file
15
board/lg/star/star.env
Normal file
@@ -0,0 +1,15 @@
|
||||
#include <env/nvidia/prod_upd.env>
|
||||
|
||||
button_cmd_0_name=Volume Down
|
||||
button_cmd_0=bootmenu
|
||||
partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}
|
||||
boot_dev=1
|
||||
|
||||
bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu
|
||||
bootmenu_1=mount external storage=usb start && ums 0 mmc 1; bootmenu
|
||||
bootmenu_2=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu
|
||||
bootmenu_3=update bootloader=run flash_uboot
|
||||
bootmenu_4=reboot RCM=enterrcm
|
||||
bootmenu_5=reboot=reset
|
||||
bootmenu_6=power off=poweroff
|
||||
bootmenu_delay=-1
|
||||
93
configs/star_defconfig
Normal file
93
configs/star_defconfig
Normal file
@@ -0,0 +1,93 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_TEGRA=y
|
||||
CONFIG_SUPPORT_PASSING_ATAGS=y
|
||||
CONFIG_CMDLINE_TAG=y
|
||||
CONFIG_INITRD_TAG=y
|
||||
CONFIG_TEXT_BASE=0x00110000
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_ENV_SOURCE_FILE="star"
|
||||
CONFIG_ENV_SIZE=0x3000
|
||||
CONFIG_ENV_OFFSET=0xFFFFD000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="tegra20-lg-star"
|
||||
CONFIG_SPL_STACK=0xffffc
|
||||
CONFIG_SPL_TEXT_BASE=0x00108000
|
||||
CONFIG_SYS_LOAD_ADDR=0x2000000
|
||||
CONFIG_TEGRA20=y
|
||||
CONFIG_TARGET_STAR=y
|
||||
CONFIG_TEGRA_ENABLE_UARTB=y
|
||||
CONFIG_CMD_EBTUPDATE=y
|
||||
CONFIG_BUTTON_CMD=y
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_AUTOBOOT_KEYED=y
|
||||
CONFIG_AUTOBOOT_KEYED_CTRLC=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_SYSTEM_SETUP=y
|
||||
CONFIG_BOOTCOMMAND="bootflow scan; echo 'Boot configuration not found... Power off in 3 sec'; sleep 3; poweroff"
|
||||
CONFIG_SYS_PBSIZE=2085
|
||||
CONFIG_SPL_FOOTPRINT_LIMIT=y
|
||||
CONFIG_SPL_MAX_FOOTPRINT=0x8000
|
||||
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||
CONFIG_SPL_HAVE_INIT_STACK=y
|
||||
CONFIG_SPL_SYS_MALLOC=y
|
||||
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
|
||||
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x90000
|
||||
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
|
||||
CONFIG_SYS_PROMPT="Tegra20 (Star) # "
|
||||
# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
|
||||
CONFIG_CMD_BOOTMENU=y
|
||||
# CONFIG_CMD_IMI is not set
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_GPT_RENAME=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_POWEROFF=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
CONFIG_CMD_UMS_ABORT_KEYED=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_PAUSE=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
# CONFIG_SPL_DOS_PARTITION is not set
|
||||
# CONFIG_SPL_EFI_PARTITION is not set
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_SYS_MMC_ENV_PART=2
|
||||
CONFIG_BUTTON=y
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0x11000000
|
||||
CONFIG_FASTBOOT_BUF_SIZE=0x5000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_DM_I2C_GPIO=y
|
||||
CONFIG_SYS_I2C_TEGRA=y
|
||||
CONFIG_BUTTON_KEYBOARD=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_DM_PMIC_MAX8907=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_MAX8907=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SYSRESET_MAX8907=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_TEGRA=y
|
||||
CONFIG_USB_ULPI_VIEWPORT=y
|
||||
CONFIG_USB_ULPI=y
|
||||
CONFIG_USB_KEYBOARD=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="LG"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x1004
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x7100
|
||||
CONFIG_CI_UDC=y
|
||||
CONFIG_VIDEO=y
|
||||
# CONFIG_VIDEO_LOGO is not set
|
||||
# CONFIG_VIDEO_BPP8 is not set
|
||||
CONFIG_VIDEO_LCD_LG_LH400WV3=y
|
||||
CONFIG_VIDEO_LCD_HITACHI_TX10D07VM0BAA=y
|
||||
CONFIG_BACKLIGHT_AAT2870=y
|
||||
CONFIG_VIDEO_BRIDGE=y
|
||||
CONFIG_TEGRA_8BIT_CPU_BRIDGE=y
|
||||
@@ -6,4 +6,5 @@ LG
|
||||
.. toctree::
|
||||
:maxdepth: 2
|
||||
|
||||
star
|
||||
x3_t30
|
||||
|
||||
125
doc/board/lg/star.rst
Normal file
125
doc/board/lg/star.rst
Normal file
@@ -0,0 +1,125 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
U-Boot for the LG Optimus 2X P990
|
||||
=================================
|
||||
|
||||
``DISCLAMER!`` Moving your device to use U-Boot assumes replacement of the
|
||||
vendor bootloader. Vendor Android firmwares will no longer be able to run on
|
||||
the device. This replacement IS reversible.
|
||||
|
||||
Quick Start
|
||||
-----------
|
||||
|
||||
- Build U-Boot
|
||||
- Process U-Boot
|
||||
- Flashing U-Boot into the eMMC
|
||||
- Boot
|
||||
- Self Upgrading
|
||||
|
||||
Build U-Boot
|
||||
------------
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ export CROSS_COMPILE=arm-none-eabi-
|
||||
$ make star_defconfig
|
||||
$ make
|
||||
|
||||
After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
|
||||
image, ready for further processing.
|
||||
|
||||
Process U-Boot
|
||||
--------------
|
||||
|
||||
``DISCLAMER!`` All questions related to the re-crypt work should be asked
|
||||
in re-crypt repo issues. NOT HERE!
|
||||
|
||||
re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form
|
||||
usable by device. This process is required only on the first installation or
|
||||
to recover the device in case of a failed update.
|
||||
|
||||
Permanent installation can be performed either by using the nv3p protocol or by
|
||||
pre-loading just built U-Boot into RAM.
|
||||
|
||||
Processing for the NV3P protocol
|
||||
********************************
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ git clone https://gitlab.com/grate-driver/re-crypt.git
|
||||
$ cd re-crypt # place your u-boot-dtb-tegra.bin here
|
||||
$ ./re-crypt.py --dev star
|
||||
|
||||
The script will produce a ``repart-block.bin`` ready to flash.
|
||||
|
||||
Processing for pre-loaded U-Boot
|
||||
********************************
|
||||
|
||||
The procedure is the same, but the ``--split`` argument is used with the
|
||||
``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready
|
||||
to flash.
|
||||
|
||||
Flashing U-Boot into the eMMC
|
||||
-----------------------------
|
||||
|
||||
``DISCLAMER!`` All questions related to NvFlash should be asked in the proper
|
||||
place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before!
|
||||
|
||||
Permanent installation can be performed either by using the nv3p protocol or by
|
||||
pre-loading just built U-Boot into RAM.
|
||||
|
||||
Flashing with the NV3P protocol
|
||||
*******************************
|
||||
|
||||
Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can
|
||||
enter it by pre-loading vendor bootloader with nvflash.
|
||||
|
||||
With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in
|
||||
encrypted state in form, which can just be written RAW at the start of eMMC.
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ ./nvflash_v1.13.87205 --bct star.bct --setbct --odmdata 0xC8000
|
||||
--configfile flash.cfg --bl android_bootloader.bin --sync
|
||||
$ ./utiils/nvflash_v1.13.87205 --resume --rawdevicewrite 0 2048 repart-block.bin
|
||||
|
||||
When flashing is done, reboot the device.
|
||||
|
||||
Flashing with a pre-loaded U-Boot
|
||||
*********************************
|
||||
|
||||
U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently
|
||||
U-Boot supports bootmenu entry fastboot, which allows to write a processed copy
|
||||
of U-Boot permanently into eMMC.
|
||||
|
||||
While pre-loading U-Boot, hold the ``volume down`` button which will trigger
|
||||
the bootmenu. There, select ``fastboot`` using the volume and power buttons.
|
||||
After, on host PC, do:
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ fastboot flash 0.1 bct.img
|
||||
$ fastboot flash 0.2 ebt.img
|
||||
$ fastboot reboot
|
||||
|
||||
Device will reboot.
|
||||
|
||||
Boot
|
||||
----
|
||||
|
||||
To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on
|
||||
eMMC. Additionally, if the Volume Down button is pressed while booting, the
|
||||
device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC
|
||||
as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console
|
||||
and update bootloader (check the next chapter).
|
||||
|
||||
Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows
|
||||
the user to use/partition it in any way the user desires.
|
||||
|
||||
Self Upgrading
|
||||
--------------
|
||||
|
||||
Place your ``u-boot-dtb-tegra.bin`` on the first partition of the MicroSD card
|
||||
and insert it into the device. Enter bootmenu, choose update the bootloader
|
||||
option with the Power button and U-Boot should update itself. Once the process
|
||||
is completed, U-Boot will ask to press any button to reboot.
|
||||
Reference in New Issue
Block a user