cyclic: Use schedule() instead of WATCHDOG_RESET()
Globally replace all occurances of WATCHDOG_RESET() with schedule(), which handles the HW_WATCHDOG functionality and the cyclic infrastructure. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
This commit is contained in:
@@ -73,7 +73,7 @@ int ecc_post_test(int flags)
|
||||
for (addr = (u64*)CONFIG_SYS_POST_ECC_START_ADDR, errbit=0;
|
||||
addr < (u64*)CONFIG_SYS_POST_ECC_STOP_ADDR; addr++, errbit++ ) {
|
||||
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
|
||||
ecc_clear(ddr);
|
||||
|
||||
|
@@ -279,7 +279,7 @@ static int memory_post_test1(unsigned long start,
|
||||
for (i = 0; i < size / sizeof (ulong); i++) {
|
||||
mem[i] = val;
|
||||
if (i % 1024 == 0)
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
}
|
||||
|
||||
for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
|
||||
@@ -292,7 +292,7 @@ static int memory_post_test1(unsigned long start,
|
||||
break;
|
||||
}
|
||||
if (i % 1024 == 0)
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
}
|
||||
|
||||
return ret;
|
||||
@@ -308,7 +308,7 @@ static int memory_post_test2(unsigned long start, unsigned long size)
|
||||
for (i = 0; i < size / sizeof (ulong); i++) {
|
||||
mem[i] = 1 << (i % 32);
|
||||
if (i % 1024 == 0)
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
}
|
||||
|
||||
for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
|
||||
@@ -321,7 +321,7 @@ static int memory_post_test2(unsigned long start, unsigned long size)
|
||||
break;
|
||||
}
|
||||
if (i % 1024 == 0)
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
}
|
||||
|
||||
return ret;
|
||||
@@ -337,7 +337,7 @@ static int memory_post_test3(unsigned long start, unsigned long size)
|
||||
for (i = 0; i < size / sizeof (ulong); i++) {
|
||||
mem[i] = i;
|
||||
if (i % 1024 == 0)
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
}
|
||||
|
||||
for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
|
||||
@@ -350,7 +350,7 @@ static int memory_post_test3(unsigned long start, unsigned long size)
|
||||
break;
|
||||
}
|
||||
if (i % 1024 == 0)
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
}
|
||||
|
||||
return ret;
|
||||
@@ -366,7 +366,7 @@ static int memory_post_test4(unsigned long start, unsigned long size)
|
||||
for (i = 0; i < size / sizeof (ulong); i++) {
|
||||
mem[i] = ~i;
|
||||
if (i % 1024 == 0)
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
}
|
||||
|
||||
for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
|
||||
@@ -379,7 +379,7 @@ static int memory_post_test4(unsigned long start, unsigned long size)
|
||||
break;
|
||||
}
|
||||
if (i % 1024 == 0)
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
}
|
||||
|
||||
return ret;
|
||||
@@ -390,15 +390,15 @@ static int memory_post_test_lines(unsigned long start, unsigned long size)
|
||||
int ret = 0;
|
||||
|
||||
ret = memory_post_dataline((unsigned long long *)start);
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (!ret)
|
||||
ret = memory_post_addrline((ulong *)start, (ulong *)start,
|
||||
size);
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (!ret)
|
||||
ret = memory_post_addrline((ulong *)(start+size-8),
|
||||
(ulong *)start, size);
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -408,25 +408,25 @@ static int memory_post_test_patterns(unsigned long start, unsigned long size)
|
||||
int ret = 0;
|
||||
|
||||
ret = memory_post_test1(start, size, 0x00000000);
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (!ret)
|
||||
ret = memory_post_test1(start, size, 0xffffffff);
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (!ret)
|
||||
ret = memory_post_test1(start, size, 0x55555555);
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (!ret)
|
||||
ret = memory_post_test1(start, size, 0xaaaaaaaa);
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (!ret)
|
||||
ret = memory_post_test2(start, size);
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (!ret)
|
||||
ret = memory_post_test3(start, size);
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (!ret)
|
||||
ret = memory_post_test4(start, size);
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@@ -61,7 +61,7 @@ int cpu_post_test (int flags)
|
||||
int ic = icache_status();
|
||||
int ret = 0;
|
||||
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (ic)
|
||||
icache_disable();
|
||||
|
||||
@@ -73,7 +73,7 @@ int cpu_post_test (int flags)
|
||||
ret = cpu_post_test_two ();
|
||||
if (ret == 0)
|
||||
ret = cpu_post_test_twox ();
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (ret == 0)
|
||||
ret = cpu_post_test_three ();
|
||||
if (ret == 0)
|
||||
@@ -82,7 +82,7 @@ int cpu_post_test (int flags)
|
||||
ret = cpu_post_test_threei ();
|
||||
if (ret == 0)
|
||||
ret = cpu_post_test_andi ();
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (ret == 0)
|
||||
ret = cpu_post_test_srawi ();
|
||||
if (ret == 0)
|
||||
@@ -91,7 +91,7 @@ int cpu_post_test (int flags)
|
||||
ret = cpu_post_test_rlwinm ();
|
||||
if (ret == 0)
|
||||
ret = cpu_post_test_rlwimi ();
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (ret == 0)
|
||||
ret = cpu_post_test_store ();
|
||||
if (ret == 0)
|
||||
@@ -100,20 +100,20 @@ int cpu_post_test (int flags)
|
||||
ret = cpu_post_test_cr ();
|
||||
if (ret == 0)
|
||||
ret = cpu_post_test_b ();
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (ret == 0)
|
||||
ret = cpu_post_test_multi ();
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
if (ret == 0)
|
||||
ret = cpu_post_test_string ();
|
||||
if (ret == 0)
|
||||
ret = cpu_post_test_complex ();
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
|
||||
if (ic)
|
||||
icache_enable();
|
||||
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@@ -43,7 +43,7 @@ int fpu_post_test (int flags)
|
||||
|
||||
int ret = 0;
|
||||
|
||||
WATCHDOG_RESET ();
|
||||
schedule();
|
||||
|
||||
if (!fpu)
|
||||
fpu_enable ();
|
||||
@@ -66,7 +66,7 @@ int fpu_post_test (int flags)
|
||||
if (!fpu)
|
||||
fpu_disable ();
|
||||
|
||||
WATCHDOG_RESET ();
|
||||
schedule();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@@ -245,7 +245,7 @@ static int post_run_single(struct post_test *test,
|
||||
{
|
||||
if ((flags & test_flags & POST_ALWAYS) &&
|
||||
(flags & test_flags & POST_MEM)) {
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
|
||||
if (!(flags & POST_REBOOT)) {
|
||||
if ((test_flags & POST_REBOOT) &&
|
||||
@@ -350,7 +350,7 @@ int post_run(char *name, int flags)
|
||||
}
|
||||
|
||||
if (i < post_list_size) {
|
||||
WATCHDOG_RESET();
|
||||
schedule();
|
||||
return post_run_single(post_list + i,
|
||||
test_flags[i],
|
||||
flags, i);
|
||||
|
Reference in New Issue
Block a user