Merge branch 'master' of git://git.denx.de/u-boot-arm
This commit is contained in:
296
include/configs/am3517_evm.h
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296
include/configs/am3517_evm.h
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@@ -0,0 +1,296 @@
|
||||
/*
|
||||
* am3517_evm.h - Default configuration for AM3517 EVM board.
|
||||
*
|
||||
* Author: Vaibhav Hiremath <hvaibhav@ti.com>
|
||||
*
|
||||
* Based on omap3_evm_config.h
|
||||
*
|
||||
* Copyright (C) 2010 Texas Instruments Incorporated
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
*/
|
||||
#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
|
||||
#define CONFIG_OMAP 1 /* in a TI OMAP core */
|
||||
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
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||||
#define CONFIG_OMAP3_AM3517EVM 1 /* working with AM3517EVM */
|
||||
|
||||
#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
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||||
|
||||
#include <asm/arch/cpu.h> /* get chip and board defs */
|
||||
#include <asm/arch/omap3.h>
|
||||
|
||||
/*
|
||||
* Display CPU and Board information
|
||||
*/
|
||||
#define CONFIG_DISPLAY_CPUINFO 1
|
||||
#define CONFIG_DISPLAY_BOARDINFO 1
|
||||
|
||||
/* Clock Defines */
|
||||
#define V_OSCK 26000000 /* Clock output from T2 */
|
||||
#define V_SCLK (V_OSCK >> 1)
|
||||
|
||||
#undef CONFIG_USE_IRQ /* no support for IRQs */
|
||||
#define CONFIG_MISC_INIT_R
|
||||
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
#define CONFIG_INITRD_TAG 1
|
||||
#define CONFIG_REVISION_TAG 1
|
||||
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
*/
|
||||
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
|
||||
/* initial data */
|
||||
/*
|
||||
* DDR related
|
||||
*/
|
||||
#define CONFIG_OMAP3_MICRON_DDR 1 /* Micron DDR */
|
||||
#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
|
||||
|
||||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
|
||||
/*
|
||||
* NS16550 Configuration
|
||||
*/
|
||||
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
|
||||
|
||||
#define CONFIG_SYS_NS16550
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||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
|
||||
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
|
||||
|
||||
/*
|
||||
* select serial console configuration
|
||||
*/
|
||||
#define CONFIG_CONS_INDEX 3
|
||||
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
|
||||
#define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
|
||||
|
||||
/* allow to overwrite serial and ethaddr */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
|
||||
115200}
|
||||
#define CONFIG_MMC 1
|
||||
#define CONFIG_OMAP3_MMC 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
|
||||
/* commands to include */
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_EXT2 /* EXT2 Support */
|
||||
#define CONFIG_CMD_FAT /* FAT support */
|
||||
#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
|
||||
|
||||
#define CONFIG_CMD_I2C /* I2C serial bus support */
|
||||
#define CONFIG_CMD_MMC /* MMC support */
|
||||
#define CONFIG_CMD_NAND /* NAND support */
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_PING
|
||||
|
||||
#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
|
||||
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
|
||||
#undef CONFIG_CMD_IMI /* iminfo */
|
||||
#undef CONFIG_CMD_IMLS /* List all found images */
|
||||
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#define CONFIG_HARD_I2C 1
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_I2C_SLAVE 1
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||||
#define CONFIG_SYS_I2C_BUS 0
|
||||
#define CONFIG_SYS_I2C_BUS_SELECT 1
|
||||
#define CONFIG_DRIVER_OMAP34XX_I2C 1
|
||||
|
||||
#undef CONFIG_CMD_NET
|
||||
/*
|
||||
* Board NAND Info.
|
||||
*/
|
||||
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
|
||||
/* to access nand */
|
||||
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
|
||||
/* to access */
|
||||
/* nand at CS0 */
|
||||
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
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||||
/* NAND devices */
|
||||
#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
|
||||
|
||||
#define CONFIG_JFFS2_NAND
|
||||
/* nand device jffs2 lives on */
|
||||
#define CONFIG_JFFS2_DEV "nand0"
|
||||
/* start of jffs2 partition */
|
||||
#define CONFIG_JFFS2_PART_OFFSET 0x680000
|
||||
#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
|
||||
|
||||
/* Environment information */
|
||||
#define CONFIG_BOOTDELAY 10
|
||||
|
||||
#define CONFIG_BOOTFILE uImage
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"loadaddr=0x82000000\0" \
|
||||
"console=ttyS2,115200n8\0" \
|
||||
"mmcargs=setenv bootargs console=${console} " \
|
||||
"root=/dev/mmcblk0p2 rw " \
|
||||
"rootfstype=ext3 rootwait\0" \
|
||||
"nandargs=setenv bootargs console=${console} " \
|
||||
"root=/dev/mtdblock4 rw " \
|
||||
"rootfstype=jffs2\0" \
|
||||
"loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
|
||||
"bootscript=echo Running bootscript from mmc ...; " \
|
||||
"source ${loadaddr}\0" \
|
||||
"loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
|
||||
"mmcboot=echo Booting from mmc ...; " \
|
||||
"run mmcargs; " \
|
||||
"bootm ${loadaddr}\0" \
|
||||
"nandboot=echo Booting from nand ...; " \
|
||||
"run nandargs; " \
|
||||
"nand read ${loadaddr} 280000 400000; " \
|
||||
"bootm ${loadaddr}\0" \
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"if mmc init; then " \
|
||||
"if run loadbootscript; then " \
|
||||
"run bootscript; " \
|
||||
"else " \
|
||||
"if run loaduimage; then " \
|
||||
"run mmcboot; " \
|
||||
"else run nandboot; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else run nandboot; fi"
|
||||
|
||||
#define CONFIG_AUTO_COMPLETE 1
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define V_PROMPT "AM3517_EVM # "
|
||||
|
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
||||
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
#define CONFIG_SYS_PROMPT V_PROMPT
|
||||
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
|
||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||
sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_MAXARGS 32 /* max number of command */
|
||||
/* args */
|
||||
/* Boot Argument Buffer Size */
|
||||
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
|
||||
/* memtest works on */
|
||||
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
|
||||
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
|
||||
0x01F00000) /* 31MB */
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
|
||||
/* address */
|
||||
|
||||
/*
|
||||
* AM3517 has 12 GP timers, they can be driven by the system clock
|
||||
* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
|
||||
* This rate is divided by a local divisor.
|
||||
*/
|
||||
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
|
||||
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Stack sizes
|
||||
*
|
||||
* The stack sizes are set up in start.S using the settings below
|
||||
*/
|
||||
#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
|
||||
#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Physical Memory Map
|
||||
*/
|
||||
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
|
||||
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
|
||||
#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
|
||||
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
|
||||
|
||||
/* SDRAM Bank Allocation method */
|
||||
#define SDRC_R_B_C 1
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH and environment organization
|
||||
*/
|
||||
|
||||
/* **** PISMO SUPPORT *** */
|
||||
|
||||
/* Configure the PISMO */
|
||||
#define PISMO1_NAND_SIZE GPMC_SIZE_128M
|
||||
#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
|
||||
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
|
||||
/* on one chip */
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
|
||||
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
|
||||
|
||||
#define CONFIG_SYS_FLASH_BASE boot_flash_base
|
||||
|
||||
/* Monitor at start of flash */
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
|
||||
|
||||
#define CONFIG_NAND_OMAP_GPMC
|
||||
#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
|
||||
#define CONFIG_ENV_IS_IN_NAND 1
|
||||
#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
|
||||
|
||||
#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec
|
||||
#define CONFIG_ENV_OFFSET boot_flash_off
|
||||
#define CONFIG_ENV_ADDR boot_flash_env_addr
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* CFI FLASH driver setup
|
||||
*/
|
||||
/* timeout values are in ticks */
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
|
||||
|
||||
/* Flash banks JFFS2 should use */
|
||||
#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
|
||||
CONFIG_SYS_MAX_NAND_DEVICE)
|
||||
#define CONFIG_SYS_JFFS2_MEM_NAND
|
||||
/* use flash_info[2] */
|
||||
#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
|
||||
#define CONFIG_SYS_JFFS2_NUM_BANKS 1
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
extern unsigned int boot_flash_base;
|
||||
extern volatile unsigned int boot_flash_env_addr;
|
||||
extern unsigned int boot_flash_off;
|
||||
extern unsigned int boot_flash_sec;
|
||||
extern unsigned int boot_flash_type;
|
||||
#endif
|
||||
|
||||
#endif /* __CONFIG_H */
|
@@ -38,6 +38,8 @@
|
||||
#define CONFIG_OMAP3430 1 /* which is in a 3430 */
|
||||
#define CONFIG_OMAP3_DEVKIT8000 1 /* working with DevKit8000 */
|
||||
|
||||
#define CONFIG_SDRC /* The chip has SDRC controller */
|
||||
|
||||
#include <asm/arch/cpu.h> /* get chip and board defs */
|
||||
#include <asm/arch/omap3.h>
|
||||
|
||||
|
@@ -37,6 +37,8 @@
|
||||
#define CONFIG_OMAP3430 1 /* which is in a 3430 */
|
||||
#define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */
|
||||
|
||||
#define CONFIG_SDRC /* The chip has SDRC controller */
|
||||
|
||||
#include <asm/arch/cpu.h> /* get chip and board defs */
|
||||
#include <asm/arch/omap3.h>
|
||||
|
||||
|
@@ -42,6 +42,8 @@
|
||||
#define CONFIG_OMAP3430 1 /* which is in a 3430 */
|
||||
#define CONFIG_OMAP3_EVM 1 /* working with EVM */
|
||||
|
||||
#define CONFIG_SDRC /* The chip has SDRC controller */
|
||||
|
||||
#include <asm/arch/cpu.h> /* get chip and board defs */
|
||||
#include <asm/arch/omap3.h>
|
||||
|
||||
@@ -151,7 +153,7 @@
|
||||
|
||||
#define CONFIG_CMD_I2C /* I2C serial bus support */
|
||||
#define CONFIG_CMD_MMC /* MMC support */
|
||||
#define CONFIG_CMD_ONENAND /* ONENAND support */
|
||||
#define CONFIG_CMD_NAND /* NAND support */
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_PING
|
||||
|
||||
@@ -306,7 +308,13 @@
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
|
||||
#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
|
||||
|
||||
#if defined(CONFIG_CMD_NAND)
|
||||
#define CONFIG_NAND_OMAP_GPMC
|
||||
#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
|
||||
#define CONFIG_ENV_IS_IN_NAND
|
||||
#elif defined(CONFIG_CMD_ONENAND)
|
||||
#define CONFIG_ENV_IS_IN_ONENAND 1
|
||||
#endif
|
||||
#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
|
||||
#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
|
||||
|
||||
|
@@ -29,6 +29,8 @@
|
||||
#define CONFIG_OMAP3430 1 /* which is in a 3430 */
|
||||
#define CONFIG_OMAP3_OVERO 1 /* working with overo */
|
||||
|
||||
#define CONFIG_SDRC /* The chip has SDRC controller */
|
||||
|
||||
#include <asm/arch/cpu.h> /* get chip and board defs */
|
||||
#include <asm/arch/omap3.h>
|
||||
|
||||
|
@@ -32,6 +32,8 @@
|
||||
#define CONFIG_OMAP3430 1 /* which is in a 3430 */
|
||||
#define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
|
||||
|
||||
#define CONFIG_SDRC /* The chip has SDRC controller */
|
||||
|
||||
#include <asm/arch/cpu.h> /* get chip and board defs */
|
||||
#include <asm/arch/omap3.h>
|
||||
|
||||
|
@@ -42,6 +42,8 @@
|
||||
#define CONFIG_OMAP3430 1 /* which is in a 3430 */
|
||||
#define CONFIG_OMAP3_3430SDP 1 /* working with SDP Rev2 */
|
||||
|
||||
#define CONFIG_SDRC /* The chip has SDRC controller */
|
||||
|
||||
#include <asm/arch/cpu.h> /* get chip and board defs */
|
||||
#include <asm/arch/omap3.h>
|
||||
|
||||
|
@@ -38,6 +38,8 @@
|
||||
#define CONFIG_OMAP3430 1 /* which is in a 3430 */
|
||||
#define CONFIG_OMAP3_ZOOM1 1 /* working with Zoom MDK Rev1 */
|
||||
|
||||
#define CONFIG_SDRC /* The chip has SDRC controller */
|
||||
|
||||
#include <asm/arch/cpu.h> /* get chip and board defs */
|
||||
#include <asm/arch/omap3.h>
|
||||
|
||||
|
@@ -39,6 +39,8 @@
|
||||
#define CONFIG_OMAP3430 1 /* which is in a 3430 */
|
||||
#define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */
|
||||
|
||||
#define CONFIG_SDRC /* The chip has SDRC controller */
|
||||
|
||||
#include <asm/arch/cpu.h> /* get chip and board defs */
|
||||
#include <asm/arch/omap3.h>
|
||||
|
||||
|
186
include/configs/pm9g45.h
Normal file
186
include/configs/pm9g45.h
Normal file
@@ -0,0 +1,186 @@
|
||||
/*
|
||||
* (C) Copyright 2010
|
||||
* Ilko Iliev <iliev@ronetix.at>
|
||||
* Asen Dimov <dimov@ronetix.at>
|
||||
* Ronetix GmbH <www.ronetix.at>
|
||||
*
|
||||
* (C) Copyright 2007-2008
|
||||
* Stelian Pop <stelian.pop@leadtechdesign.com>
|
||||
* Lead Tech Design <www.leadtechdesign.com>
|
||||
*
|
||||
* Configuation settings for the PM9G45 board.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
||||
#define CONFIG_PM9G45 1 /* It's an Ronetix PM9G45 */
|
||||
#define CONFIG_AT91SAM9G45 1 /* It's an Atmel AT91SAM9G45 SoC */
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_ARCH_CPU_INIT
|
||||
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
#define CONFIG_INITRD_TAG 1
|
||||
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_SKIP_RELOCATE_UBOOT
|
||||
|
||||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
#define CONFIG_AT91_GPIO 1
|
||||
#define CONFIG_ATMEL_USART 1
|
||||
#define CONFIG_USART3 1 /* USART 3 is DBGU */
|
||||
|
||||
#define CONFIG_SYS_USE_NANDFLASH 1
|
||||
|
||||
/* LED */
|
||||
#define CONFIG_AT91_LED
|
||||
#define CONFIG_RED_LED AT91_PIO_PORTD, 31 /* this is the user1 led */
|
||||
#define CONFIG_GREEN_LED AT91_PIO_PORTD, 0 /* this is the user2 led */
|
||||
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
*/
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE 1
|
||||
#define CONFIG_BOOTP_BOOTPATH 1
|
||||
#define CONFIG_BOOTP_GATEWAY 1
|
||||
#define CONFIG_BOOTP_HOSTNAME 1
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
#undef CONFIG_CMD_FPGA
|
||||
#undef CONFIG_CMD_IMLS
|
||||
|
||||
#define CONFIG_CMD_PING 1
|
||||
#define CONFIG_CMD_DHCP 1
|
||||
#define CONFIG_CMD_NAND 1
|
||||
#define CONFIG_CMD_USB 1
|
||||
|
||||
#define CONFIG_CMD_JFFS2 1
|
||||
#define CONFIG_JFFS2_CMDLINE 1
|
||||
#define CONFIG_JFFS2_NAND 1
|
||||
#define CONFIG_JFFS2_DEV "nand0" /* NAND dev jffs2 lives on */
|
||||
#define CONFIG_JFFS2_PART_OFFSET 0 /* start of jffs2 partition */
|
||||
#define CONFIG_JFFS2_PART_SIZE (256 * 1024 * 1024) /* partition */
|
||||
|
||||
/* SDRAM */
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM 0x70000000
|
||||
#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */
|
||||
|
||||
/* NOR flash, not available */
|
||||
#define CONFIG_SYS_NO_FLASH 1
|
||||
#undef CONFIG_CMD_FLASH
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_MAX_CHIPS 1
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||
#define CONFIG_SYS_NAND_DBW_8 1
|
||||
/* our ALE is AD21 */
|
||||
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
|
||||
/* our CLE is AD22 */
|
||||
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
|
||||
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14
|
||||
#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTD, 3
|
||||
|
||||
#endif
|
||||
|
||||
/* Ethernet */
|
||||
#define CONFIG_MACB 1
|
||||
#define CONFIG_RMII 1
|
||||
#define CONFIG_NET_MULTI 1
|
||||
#define CONFIG_NET_RETRY_COUNT 20
|
||||
#define CONFIG_RESET_PHY_R 1
|
||||
|
||||
/* USB */
|
||||
#define CONFIG_USB_ATMEL
|
||||
#define CONFIG_USB_OHCI_NEW 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
|
||||
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* _UHP_OHCI_BASE */
|
||||
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g45"
|
||||
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
|
||||
#define CONFIG_USB_STORAGE 1
|
||||
|
||||
/* board specific(not enough SRAM) */
|
||||
#define CONFIG_AT91SAM9G45_LCD_BASE PHYS_SDRAM + 0xE00000
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM + 0x2000000 /* load addr */
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
|
||||
#define CONFIG_SYS_MEMTEST_END CONFIG_AT91SAM9G45_LCD_BASE
|
||||
|
||||
/* bootstrap + u-boot + env + linux in nandflash */
|
||||
#define CONFIG_ENV_IS_IN_NAND 1
|
||||
#define CONFIG_ENV_OFFSET 0x60000
|
||||
#define CONFIG_ENV_OFFSET_REDUND 0x80000
|
||||
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
|
||||
#define CONFIG_BOOTCOMMAND "nand read 0x72000000 0x200000 0x200000; bootm"
|
||||
#define CONFIG_BOOTARGS "fbcon=rotate:3 console=tty0 " \
|
||||
"console=ttyS0,115200 " \
|
||||
"root=/dev/mtdblock4 " \
|
||||
"mtdparts=atmel_nand:128k(bootstrap)ro," \
|
||||
"256k(uboot)ro,1664k(env)," \
|
||||
"2M(linux)ro,-(root) rw " \
|
||||
"rootfstype=jffs2"
|
||||
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
|
||||
|
||||
#define CONFIG_SYS_PROMPT "U-Boot> "
|
||||
#define CONFIG_SYS_CBSIZE 256
|
||||
#define CONFIG_SYS_MAXARGS 16
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||
sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_LONGHELP 1
|
||||
#define CONFIG_CMDLINE_EDITING 1
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
*/
|
||||
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024,\
|
||||
0x1000)
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
|
||||
|
||||
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
#error CONFIG_USE_IRQ not supported
|
||||
#endif
|
||||
|
||||
#endif
|
217
include/configs/s5p_goni.h
Normal file
217
include/configs/s5p_goni.h
Normal file
@@ -0,0 +1,217 @@
|
||||
/*
|
||||
* Copyright (C) 2009 Samsung Electronics
|
||||
* Minkyu Kang <mk7.kang@samsung.com>
|
||||
* Kyungmin Park <kyungmin.park@samsung.com>
|
||||
*
|
||||
* Configuation settings for the SAMSUNG Universal (s5pc100) board.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/* High Level Configuration Options */
|
||||
#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
|
||||
#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
|
||||
#define CONFIG_S5PC1XX 1 /* which is in a S5PC1XX Family */
|
||||
#define CONFIG_S5PC110 1 /* which is in a S5PC110 */
|
||||
#define CONFIG_MACH_GONI 1 /* working with Goni */
|
||||
|
||||
#include <asm/arch/cpu.h> /* get chip and board defs */
|
||||
|
||||
#define CONFIG_ARCH_CPU_INIT
|
||||
#define CONFIG_DISPLAY_CPUINFO
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
#undef CONFIG_SKIP_RELOCATE_UBOOT
|
||||
|
||||
/* input clock of PLL: has 24MHz input clock at S5PC110 */
|
||||
#define CONFIG_SYS_CLK_FREQ_C110 24000000
|
||||
|
||||
/* DRAM Base */
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x30000000
|
||||
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_INITRD_TAG
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
* 1MB = 0x100000, 0x100000 = 1024 * 1024
|
||||
*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes for */
|
||||
/* initial data */
|
||||
/*
|
||||
* select serial console configuration
|
||||
*/
|
||||
#define CONFIG_SERIAL2 1 /* use SERIAL2 */
|
||||
#define CONFIG_SERIAL_MULTI 1
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
/* It should define before config_cmd_default.h */
|
||||
#define CONFIG_SYS_NO_FLASH 1
|
||||
|
||||
/* Command definition */
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#undef CONFIG_CMD_FPGA
|
||||
#undef CONFIG_CMD_MISC
|
||||
#undef CONFIG_CMD_NET
|
||||
#undef CONFIG_CMD_NFS
|
||||
#undef CONFIG_CMD_XIMG
|
||||
#define CONFIG_CMD_CACHE
|
||||
#define CONFIG_CMD_REGINFO
|
||||
#define CONFIG_CMD_ONENAND
|
||||
#define CONFIG_CMD_MTDPARTS
|
||||
|
||||
#define CONFIG_BOOTDELAY 1
|
||||
#define CONFIG_ZERO_BOOTDELAY_CHECK
|
||||
|
||||
#define CONFIG_MTD_DEVICE
|
||||
#define CONFIG_MTD_PARTITIONS
|
||||
|
||||
/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
|
||||
#define MTDIDS_DEFAULT "onenand0=samsung-onenand"
|
||||
#define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:1m(bootloader)"\
|
||||
",256k(params)"\
|
||||
",2816k(config)"\
|
||||
",8m(csa)"\
|
||||
",7m(kernel)"\
|
||||
",1m(log)"\
|
||||
",12m(modem)"\
|
||||
",60m(qboot)"\
|
||||
",-(UBI)\0"
|
||||
|
||||
#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
|
||||
|
||||
#define CONFIG_BOOTCOMMAND "run ubifsboot"
|
||||
|
||||
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
|
||||
|
||||
#define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \
|
||||
" ${console} ${meminfo}"
|
||||
|
||||
#define CONFIG_COMMON_BOOT "${console} ${meminfo} ${mtdparts}"
|
||||
|
||||
#define CONFIG_BOOTARGS "root=/dev/mtdblock8 ubi.mtd=8 ubi.mtd=3 ubi.mtd=6" \
|
||||
" rootfstype=cramfs " CONFIG_COMMON_BOOT
|
||||
|
||||
#define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x100000;" \
|
||||
" onenand write 0x32008000 0x0 0x100000\0"
|
||||
|
||||
#define CONFIG_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=3 ubi.mtd=6"
|
||||
|
||||
#define CONFIG_UBIFS_OPTION "rootflags=bulk_read,no_chk_data_crc"
|
||||
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
CONFIG_UPDATEB \
|
||||
"updatek=" \
|
||||
"onenand erase 0xc00000 0x600000;" \
|
||||
"onenand write 0x31008000 0xc00000 0x600000\0" \
|
||||
"updateu=" \
|
||||
"onenand erase 0x01560000 0x1eaa0000;" \
|
||||
"onenand write 0x32000000 0x1260000 0x8C0000\0" \
|
||||
"bootk=" \
|
||||
"onenand read 0x30007FC0 0xc00000 0x600000;" \
|
||||
"bootm 0x30007FC0\0" \
|
||||
"flashboot=" \
|
||||
"set bootargs root=/dev/mtdblock${bootblock} " \
|
||||
"rootfstype=${rootfstype}" CONFIG_UBI_MTD " ${opts} " \
|
||||
"${lcdinfo} " CONFIG_COMMON_BOOT "; run bootk\0" \
|
||||
"ubifsboot=" \
|
||||
"set bootargs root=ubi0!rootfs rootfstype=ubifs " \
|
||||
CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \
|
||||
CONFIG_COMMON_BOOT "; run bootk\0" \
|
||||
"tftpboot=" \
|
||||
"set bootargs root=ubi0!rootfs rootfstype=ubifs " \
|
||||
CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \
|
||||
CONFIG_COMMON_BOOT "; tftp 0x30007FC0 uImage; " \
|
||||
"bootm 0x30007FC0\0" \
|
||||
"ramboot=" \
|
||||
"set bootargs " CONFIG_RAMDISK_BOOT \
|
||||
" initrd=0x33000000,8M ramdisk=8192\0" \
|
||||
"mmcboot=" \
|
||||
"set bootargs root=${mmcblk} rootfstype=${rootfstype}" \
|
||||
CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \
|
||||
CONFIG_COMMON_BOOT "; run bootk\0" \
|
||||
"boottrace=setenv opts initcall_debug; run bootcmd\0" \
|
||||
"bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
|
||||
"verify=n\0" \
|
||||
"rootfstype=cramfs\0" \
|
||||
"console=" CONFIG_DEFAULT_CONSOLE \
|
||||
"mtdparts=" MTDPARTS_DEFAULT \
|
||||
"meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \
|
||||
"mmcblk=/dev/mmcblk1p1\0" \
|
||||
"bootblock=9\0" \
|
||||
"ubiblock=8\0" \
|
||||
"ubi=enabled\0" \
|
||||
"opts=always_resume=1"
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
||||
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
#define CONFIG_SYS_PROMPT "Goni # "
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
/* Boot Argument Buffer Size */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
/* memtest works on */
|
||||
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
|
||||
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
|
||||
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000000)
|
||||
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
/* valid baudrates */
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
|
||||
/* Stack sizes */
|
||||
#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
|
||||
|
||||
/* Goni has 3 banks of DRAM, but swap the bank */
|
||||
#define CONFIG_NR_DRAM_BANKS 3
|
||||
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */
|
||||
#define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */
|
||||
#define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */
|
||||
#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in Bank #1 */
|
||||
#define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */
|
||||
#define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */
|
||||
|
||||
#define CONFIG_SYS_MONITOR_BASE 0x00000000
|
||||
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */
|
||||
|
||||
/* FLASH and environment organization */
|
||||
#define CONFIG_ENV_IS_IN_ONENAND 1
|
||||
#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB, 0x40000 */
|
||||
#define CONFIG_ENV_ADDR (1 << 20) /* 1 MB, 0x100000 */
|
||||
|
||||
#define CONFIG_USE_ONENAND_BOARD_INIT
|
||||
#define CONFIG_SAMSUNG_ONENAND 1
|
||||
#define CONFIG_SYS_ONENAND_BASE 0xB0000000
|
||||
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
|
||||
#endif /* __CONFIG_H */
|
@@ -40,6 +40,12 @@
|
||||
#define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */
|
||||
#define CONFIG_SMDK6400 1 /* on a SAMSUNG SMDK6400 Board */
|
||||
|
||||
#define CONFIG_SKIP_RELOCATE_UBOOT
|
||||
|
||||
#define CONFIG_PERIPORT_REMAP
|
||||
#define CONFIG_PERIPORT_BASE 0x70000000
|
||||
#define CONFIG_PERIPORT_SIZE 0x13
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x50000000
|
||||
|
||||
/* input clock of PLL: SMDK6400 has 12MHz input clock */
|
||||
@@ -61,8 +67,6 @@
|
||||
#define CONFIG_DISPLAY_CPUINFO
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
#undef CONFIG_SKIP_RELOCATE_UBOOT
|
||||
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
*/
|
||||
|
153
include/configs/tnetv107x_evm.h
Normal file
153
include/configs/tnetv107x_evm.h
Normal file
@@ -0,0 +1,153 @@
|
||||
/*
|
||||
* Copyright (C) 2008 Texas Instruments, Inc <www.ti.com>
|
||||
*
|
||||
* Based on davinci_dvevm.h. Original Copyrights follow:
|
||||
*
|
||||
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#include <asm/sizes.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/clock.h>
|
||||
|
||||
/* Architecture, CPU, etc */
|
||||
#define CONFIG_ARM1176
|
||||
#define CONFIG_TNETV107X
|
||||
#define CONFIG_TNETV107X_EVM
|
||||
#define CONFIG_ARCH_CPU_INIT
|
||||
#define CONFIG_SYS_UBOOT_BASE TEXT_BASE
|
||||
#define CONFIG_DISABLE_TCM
|
||||
#define CONFIG_PERIPORT_REMAP
|
||||
#define CONFIG_PERIPORT_BASE 0x2000000
|
||||
#define CONFIG_PERIPORT_SIZE 0x10
|
||||
#define CONFIG_SYS_CLK_FREQ clk_get_rate(TNETV107X_LPSC_ARM)
|
||||
|
||||
#define CONFIG_SYS_TIMERBASE TNETV107X_TIMER0_BASE
|
||||
#define CONFIG_SYS_HZ_CLOCK clk_get_rate(TNETV107X_LPSC_TIMER0)
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_PLL_SYS_EXT_FREQ 25000000
|
||||
#define CONFIG_PLL_TDM_EXT_FREQ 19200000
|
||||
#define CONFIG_PLL_ETH_EXT_FREQ 25000000
|
||||
|
||||
/* Memory Info */
|
||||
#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024)
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128
|
||||
#define PHYS_SDRAM_1 TNETV107X_DDR_EMIF_DATA_BASE
|
||||
#define PHYS_SDRAM_1_SIZE 0x04000000
|
||||
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
|
||||
#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024)
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define CONFIG_STACKSIZE (256*1024)
|
||||
|
||||
/* Serial Driver Info */
|
||||
#define CONFIG_SYS_NS16550
|
||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE -4
|
||||
#define CONFIG_SYS_NS16550_COM1 TNETV107X_UART1_BASE
|
||||
#define CONFIG_SYS_NS16550_CLK clk_get_rate(TNETV107X_LPSC_UART1)
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
|
||||
/* Flash and environment info */
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#define CONFIG_ENV_IS_IN_NAND
|
||||
#define CONFIG_NAND_DAVINCI
|
||||
#define CONFIG_ENV_SIZE (SZ_128K)
|
||||
#define CONFIG_SYS_NAND_HW_ECC
|
||||
#define CONFIG_SYS_NAND_1BIT_ECC
|
||||
#define CONFIG_SYS_NAND_CS 2
|
||||
#define CONFIG_SYS_NAND_USE_FLASH_BBT
|
||||
#define CONFIG_SYS_NAND_BASE TNETV107X_ASYNC_EMIF_DATA_CE0_BASE
|
||||
#define CONFIG_SYS_CLE_MASK 0x10
|
||||
#define CONFIG_SYS_ALE_MASK 0x8
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_MTD_PARTITIONS
|
||||
#define CONFIG_CMD_MTDPARTS
|
||||
#define CONFIG_MTD_DEVICE
|
||||
#define CONFIG_JFFS2_NAND
|
||||
#define NAND_MAX_CHIPS 1
|
||||
#define CONFIG_ENV_OFFSET 0x180000
|
||||
#define DEF_BOOTM ""
|
||||
|
||||
/*
|
||||
* davinci_nand is a bit of a misnomer since this particular EMIF block is
|
||||
* commonly used across multiple TI devices. Unfortunately, this misnomer
|
||||
* (amongst others) carries forward into the kernel too. Consequently, if we
|
||||
* use a different device name here, the mtdparts variable won't be usable as
|
||||
* a kernel command-line argument.
|
||||
*/
|
||||
#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
|
||||
#define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \
|
||||
"1536k(uboot)ro," \
|
||||
"128k(params)ro," \
|
||||
"4m(kernel)," \
|
||||
"-(filesystem)"
|
||||
|
||||
/* General U-Boot configuration */
|
||||
#define CONFIG_BOOTFILE "uImage"
|
||||
#define CONFIG_SYS_PROMPT "U-Boot > "
|
||||
#define CONFIG_SYS_CBSIZE 1024
|
||||
#define CONFIG_SYS_MAXARGS 64
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
#define CONFIG_VERSION_VARIABLE
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_CRC32_VERIFY
|
||||
#define CONFIG_MX_CYCLIC
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||
sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_MEMTEST_START + \
|
||||
0x700000)
|
||||
#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_BOOTARGS "mem=32M console=ttyS1,115200n8 " \
|
||||
"root=/dev/mmcblk0p1 rw noinitrd"
|
||||
#define CONFIG_BOOTCOMMAND ""
|
||||
#define CONFIG_BOOTDELAY 1
|
||||
|
||||
#define CONFIG_CMD_BDI
|
||||
#define CONFIG_CMD_BOOTD
|
||||
#define CONFIG_CMD_CONSOLE
|
||||
#define CONFIG_CMD_ECHO
|
||||
#define CONFIG_CMD_EDITENV
|
||||
#define CONFIG_CMD_IMI
|
||||
#define CONFIG_CMD_ITEST
|
||||
#define CONFIG_CMD_LOADB
|
||||
#define CONFIG_CMD_LOADS
|
||||
#define CONFIG_CMD_MEMORY
|
||||
#define CONFIG_CMD_MISC
|
||||
#define CONFIG_CMD_RUN
|
||||
#define CONFIG_CMD_SAVEENV
|
||||
#define CONFIG_CMD_SOURCE
|
||||
#define CONFIG_CMD_ENV
|
||||
#define CONFIG_CMD_ASKENV
|
||||
#define CONFIG_CMD_SAVES
|
||||
#define CONFIG_CMD_MEMORY
|
||||
#define CONFIG_CMD_NAND
|
||||
#define CONFIG_CMD_JFFS2
|
||||
|
||||
#endif /* __CONFIG_H */
|
Reference in New Issue
Block a user