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sunxi: clock: D1/R528: Enable PLL LDO during PLL1 setup

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The D1/R528/T113s SoCs introduce a new "LDO enable" bit in the CPUX_PLL.
Just enable that when we program that PLL.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Andre Przywara
2022-12-02 20:30:40 +00:00
parent b9a91b98e8
commit 39ba474698
2 changed files with 8 additions and 5 deletions
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1
arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h
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@@ -228,6 +228,7 @@ struct sunxi_ccm_reg {
/* pll1 bit field */
#define CCM_PLL1_CTRL_EN BIT(31)
#define CCM_PLL1_LDO_EN BIT(30)
#define CCM_PLL1_LOCK_EN BIT(29)
#define CCM_PLL1_LOCK BIT(28)
#define CCM_PLL1_OUT_EN BIT(27)