Merge tag 'efi-2025-04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2025-04-rc5 CI: * https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/25196 UEFI: * Export _start symbol from crt0_*_efi stubs * Move .dynamic out of .text in EFI * scripts/Makefile.lib: Preserve the .dynstr section as well Documentation: * net: miiphybb: Convert documentation to rst
This commit is contained in:
@@ -144,6 +144,7 @@ section_table:
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IMAGE_SCN_CNT_INITIALIZED_DATA)
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.align 12
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.globl _start
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_start:
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stp x29, x30, [sp, #-32]!
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mov x29, sp
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@@ -143,6 +143,7 @@ section_table:
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IMAGE_SCN_CNT_INITIALIZED_DATA)
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.align 12
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.globl _start
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_start:
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stmfd sp!, {r0-r2, lr}
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@@ -179,6 +179,7 @@ section_table:
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IMAGE_SCN_CNT_INITIALIZED_DATA)
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.align 12
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.globl _start
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_start:
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addi sp, sp, -(SIZE_LONG * 3)
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SAVE_LONG(a0, 0)
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@@ -1,39 +0,0 @@
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This patch rewrites the miiphybb ( Bit-banged MII bus driver ) in order to
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support an arbitrary number of mii buses. This feature is useful when your
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board uses different mii buses for different phys and all (or a part) of these
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buses are implemented via bit-banging mode.
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The driver requires that the following macros should be defined into the board
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configuration file:
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CONFIG_BITBANGMII - Enable the miiphybb driver
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The board code needs to fill the bb_miiphy_buses[] array with a record for
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each required bus and declare the bb_miiphy_buses_num variable with the
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number of mii buses. The record (struct bb_miiphy_bus) has the following
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fields/callbacks (see miiphy.h for details):
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char name[] - The symbolic name that must be equal to the MII bus
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registered name
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int (*init)() - Initialization function called at startup time (just
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before the Ethernet initialization)
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int (*mdio_active)() - Activate the MDIO pin as output
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int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin
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int (*set_mdio)() - Write the MDIO pin
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int (*get_mdio)() - Read the MDIO pin
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int (*set_mdc)() - Write the MDC pin
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int (*delay)() - Delay function
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void *priv - Private data used by board specific code
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The board code will look like:
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struct bb_miiphy_bus bb_miiphy_buses[] = {
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{ .name = "miibus#1", .init = b1_init, .mdio_active = b1_mdio_active, ... },
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{ .name = "miibus#2", .init = b2_init, .mdio_active = b2_mdio_active, ... },
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...
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};
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int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
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sizeof(bb_miiphy_buses[0]);
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2009 Industrie Dial Face S.p.A.
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Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
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75
doc/develop/bitbangmii.rst
Normal file
75
doc/develop/bitbangmii.rst
Normal file
@@ -0,0 +1,75 @@
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.. SPDX-License-Identifier: GPL-2.0-or-later
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.. Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>, Industrie Dial Face S.p.A., 2009
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Bit-banged MII bus support
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==========================
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The miiphybb ( Bit-banged MII bus driver ) supports an arbitrary number of
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MII buses. This feature is useful when a driver uses different MII buses for
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different PHYs and all (or a part) of these buses are implemented via
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bit-banging mode.
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The driver requires that the following macro is defined in the board
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configuration file:
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* CONFIG_BITBANGMII - Enable the miiphybb driver
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The driver code needs to allocate a regular MDIO device using mdio_alloc()
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and assign .read and .write accessors which wrap bb_miiphy_read() and
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bb_miiphy_write() functions respectively. The bb_miiphy_read() and
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bb_miiphy_write() functions take a pointer to a callback structure,
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struct bb_miiphy_bus_ops. The struct bb_miiphy_bus_ops has the following
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fields/callbacks (see miiphy.h for details):
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.. code-block:: c
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int (*mdio_active)() // Activate the MDIO pin as output
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int (*mdio_tristate)() // Activate the MDIO pin as input/tristate pin
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int (*set_mdio)() // Write the MDIO pin
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int (*get_mdio)() // Read the MDIO pin
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int (*set_mdc)() // Write the MDC pin
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int (*delay)() // Delay function
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The driver code will look like:
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.. code-block:: c
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static const struct bb_miiphy_bus_ops ravb_bb_miiphy_bus_ops = {
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.mdio_active = ravb_bb_mdio_active,
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.mdio_tristate = ravb_bb_mdio_tristate,
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.set_mdio = ravb_bb_set_mdio,
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.get_mdio = ravb_bb_get_mdio,
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.set_mdc = ravb_bb_set_mdc,
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.delay = ravb_bb_delay,
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};
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static int ravb_bb_miiphy_read(struct mii_dev *miidev, int addr,
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int devad, int reg)
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{
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return bb_miiphy_read(miidev, &ravb_bb_miiphy_bus_ops,
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addr, devad, reg);
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}
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static int ravb_bb_miiphy_write(struct mii_dev *miidev, int addr,
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int devad, int reg, u16 value)
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{
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return bb_miiphy_write(miidev, &ravb_bb_miiphy_bus_ops,
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addr, devad, reg, value);
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}
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static int ravb_probe(struct udevice *dev)
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{
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struct mii_dev *mdiodev;
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...
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mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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mdiodev->read = ravb_bb_miiphy_read;
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mdiodev->write = ravb_bb_miiphy_write;
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mdiodev->priv = eth;
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snprintf(mdiodev->name, sizeof(mdiodev->name), dev->name);
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ret = mdio_register(mdiodev);
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...
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}
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@@ -9,6 +9,7 @@ General
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.. toctree::
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:maxdepth: 1
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bitbangmii
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board_best_practices
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codingstyle
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designprinciples
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@@ -21,10 +21,10 @@ SECTIONS
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*(.gnu.linkonce.t.*)
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*(.srodata)
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*(.rodata*)
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. = ALIGN(16);
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*(.dynamic);
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. = ALIGN(512);
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}
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. = ALIGN(16);
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.dynamic : { *(.dynamic) }
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. = ALIGN(512);
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.rela.dyn : { *(.rela.dyn) }
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.rela.plt : { *(.rela.plt) }
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.rela.got : { *(.rela.got) }
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@@ -513,8 +513,8 @@ $(obj)/%_efi.S: $(obj)/%.efi
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$(call cmd,S_efi)
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quiet_cmd_efi_objcopy = OBJCOPY $@
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cmd_efi_objcopy = $(OBJCOPY) -j .header -j .text -j .sdata -j .data -j \
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.dynamic -j .dynsym -j .rel* -j .rela* -j .reloc \
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cmd_efi_objcopy = $(OBJCOPY) -j .header -j .text -j .sdata -j .data \
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-j .dynamic -j .dynstr -j .dynsym -j .rel* -j .reloc \
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$(if $(EFI_TARGET),$(EFI_TARGET),-O binary) $^ $@
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$(obj)/%.efi: $(obj)/%_efi.so
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