ram: Remove <common.h> and add needed includes

Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-01 19:31:11 -06:00
parent 37de71874d
commit 41b7743e68
41 changed files with 22 additions and 40 deletions
--- a/drivers/ram/aspeed/sdram_ast2500.c
+++ b/drivers/ram/aspeed/sdram_ast2500.c
@@ -5,7 +5,7 @@
 * Copyright 2016 Google, Inc
 */

-#include <common.h>
+#include <config.h>
 #include <clk.h>
 #include <dm.h>
 #include <errno.h>
--- a/drivers/ram/aspeed/sdram_ast2600.c
+++ b/drivers/ram/aspeed/sdram_ast2600.c
@@ -2,7 +2,7 @@
 /*
 * Copyright (C) ASPEED Technology Inc.
 */
-#include <common.h>
+#include <config.h>
 #include <clk.h>
 #include <dm.h>
 #include <errno.h>
--- a/drivers/ram/bmips_ram.c
+++ b/drivers/ram/bmips_ram.c
@@ -7,7 +7,6 @@
 *	Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
 */

-#include <common.h>
 #include <dm.h>
 #include <errno.h>
 #include <init.h>
--- a/drivers/ram/cadence/ddr_ctrl.c
+++ b/drivers/ram/cadence/ddr_ctrl.c
@@ -24,7 +24,6 @@
 * bandwidth allocated to each AXI slave can be set.
 */

-#include <common.h>
 #include <linux/delay.h>
 #include <linux/sizes.h>
 #include <asm/io.h>
--- a/drivers/ram/imxrt_sdram.c
+++ b/drivers/ram/imxrt_sdram.c
@@ -4,7 +4,6 @@
 * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
 */

-#include <common.h>
 #include <clk.h>
 #include <dm.h>
 #include <dm/device_compat.h>
--- a/drivers/ram/k3-am654-ddrss.c
+++ b/drivers/ram/k3-am654-ddrss.c
@@ -6,7 +6,6 @@
 *	Lokesh Vutla <lokeshvutla@ti.com>
 */

-#include <common.h>
 #include <clk.h>
 #include <dm.h>
 #include <log.h>
--- a/drivers/ram/k3-ddrss/k3-ddrss.c
+++ b/drivers/ram/k3-ddrss/k3-ddrss.c
@@ -5,7 +5,6 @@
 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
 */

-#include <common.h>
 #include <config.h>
 #include <clk.h>
 #include <div64.h>
--- a/drivers/ram/mediatek/ddr3-mt7629.c
+++ b/drivers/ram/mediatek/ddr3-mt7629.c
@@ -8,7 +8,7 @@
 */

 #include <clk.h>
-#include <common.h>
+#include <config.h>
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
--- a/drivers/ram/mpc83xx_sdram.c
+++ b/drivers/ram/mpc83xx_sdram.c
@@ -4,7 +4,6 @@
 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
 */

-#include <common.h>
 #include <dm.h>
 #include <init.h>
 #include <log.h>
--- a/drivers/ram/ram-uclass.c
+++ b/drivers/ram/ram-uclass.c
@@ -6,7 +6,6 @@

 #define LOG_CATEGORY UCLASS_RAM

-#include <common.h>
 #include <ram.h>
 #include <dm.h>
 #include <errno.h>
--- a/drivers/ram/renesas/rzn1/ddr_async.c
+++ b/drivers/ram/renesas/rzn1/ddr_async.c
@@ -7,7 +7,6 @@
 *
 * Copyright (C) 2015 Renesas Electronics Europe Ltd
 */
-#include <common.h>
 #include <clk.h>
 #include <dm.h>
 #include <dm/device_compat.h>
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -3,7 +3,7 @@
 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
 */

-#include <common.h>
+#include <config.h>
 #include <clk.h>
 #include <dm.h>
 #include <hang.h>
--- a/drivers/ram/rockchip/sdram_common.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -3,7 +3,7 @@
 * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
 */

-#include <common.h>
+#include <config.h>
 #include <debug_uart.h>
 #include <ram.h>
 #include <asm/io.h>
--- a/drivers/ram/rockchip/sdram_pctl_px30.c
+++ b/drivers/ram/rockchip/sdram_pctl_px30.c
@@ -3,7 +3,6 @@
 * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
 */

-#include <common.h>
 #include <ram.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/sdram.h>
--- a/drivers/ram/rockchip/sdram_phy_px30.c
+++ b/drivers/ram/rockchip/sdram_phy_px30.c
@@ -3,7 +3,6 @@
 * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
 */

-#include <common.h>
 #include <ram.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/sdram.h>
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -3,7 +3,7 @@
 * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
 */

-#include <common.h>
+#include <config.h>
 #include <debug_uart.h>
 #include <dm.h>
 #include <init.h>
--- a/drivers/ram/rockchip/sdram_rk3066.c
+++ b/drivers/ram/rockchip/sdram_rk3066.c
@@ -6,7 +6,7 @@
 * Adapted from the very similar rk3188 ddr init.
 */

-#include <common.h>
+#include <config.h>
 #include <clk.h>
 #include <dm.h>
 #include <dt-structs.h>
--- a/drivers/ram/rockchip/sdram_rk3128.c
+++ b/drivers/ram/rockchip/sdram_rk3128.c
@@ -3,7 +3,7 @@
 * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
 */

-#include <common.h>
+#include <config.h>
 #include <dm.h>
 #include <log.h>
 #include <ram.h>
--- a/drivers/ram/rockchip/sdram_rk3188.c
+++ b/drivers/ram/rockchip/sdram_rk3188.c
@@ -6,7 +6,7 @@
 * Adapted from the very similar rk3288 ddr init.
 */

-#include <common.h>
+#include <config.h>
 #include <clk.h>
 #include <dm.h>
 #include <dt-structs.h>
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -2,7 +2,7 @@
 /*
 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
 */
-#include <common.h>
+#include <config.h>
 #include <clk.h>
 #include <dm.h>
 #include <dt-structs.h>
--- a/drivers/ram/rockchip/sdram_rk3288.c
+++ b/drivers/ram/rockchip/sdram_rk3288.c
@@ -6,7 +6,7 @@
 * Adapted from coreboot.
 */

-#include <common.h>
+#include <config.h>
 #include <clk.h>
 #include <dm.h>
 #include <dt-structs.h>
--- a/drivers/ram/rockchip/sdram_rk3308.c
+++ b/drivers/ram/rockchip/sdram_rk3308.c
@@ -3,7 +3,7 @@
 * (C) Copyright 2019 Rockchip Electronics Co., Ltd.
 */

-#include <common.h>
+#include <config.h>
 #include <dm.h>
 #include <ram.h>
 #include <syscon.h>
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -2,7 +2,7 @@
 /*
 * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
 */
-#include <common.h>
+#include <config.h>
 #include <clk.h>
 #include <debug_uart.h>
 #include <dm.h>
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -5,7 +5,7 @@
 * Adapted from coreboot.
 */

-#include <common.h>
+#include <config.h>
 #include <clk.h>
 #include <dm.h>
 #include <dt-structs.h>
--- a/drivers/ram/rockchip/sdram_rk3568.c
+++ b/drivers/ram/rockchip/sdram_rk3568.c
@@ -3,7 +3,7 @@
 * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
 */

-#include <common.h>
+#include <config.h>
 #include <dm.h>
 #include <ram.h>
 #include <syscon.h>
--- a/drivers/ram/rockchip/sdram_rk3588.c
+++ b/drivers/ram/rockchip/sdram_rk3588.c
@@ -3,7 +3,7 @@
 * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
 */

-#include <common.h>
+#include <config.h>
 #include <dm.h>
 #include <ram.h>
 #include <syscon.h>
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -4,7 +4,7 @@
 * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
 */

-#include <common.h>
+#include <config.h>
 #include <debug_uart.h>
 #include <dm.h>
 #include <ram.h>
--- a/drivers/ram/sandbox_ram.c
+++ b/drivers/ram/sandbox_ram.c
@@ -4,7 +4,6 @@
 * Written by Simon Glass <sjg@chromium.org>
 */

-#include <common.h>
 #include <dm.h>
 #include <errno.h>
 #include <ram.h>
--- a/drivers/ram/sifive/sifive_ddr.c
+++ b/drivers/ram/sifive/sifive_ddr.c
@@ -6,7 +6,6 @@
 *   Pragnesh Patel <pragnesh.patel@sifive.com>
 */

-#include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
 #include <init.h>
--- a/drivers/ram/starfive/ddrcsr_boot.c
+++ b/drivers/ram/starfive/ddrcsr_boot.c
@@ -4,7 +4,6 @@
 * Author: Yanhong Wang<yanhong.wang@starfivetech.com>
 */

-#include <common.h>
 #include <asm/io.h>
 #include <asm/arch/regs.h>
 #include <linux/delay.h>
--- a/drivers/ram/starfive/ddrphy_start.c
+++ b/drivers/ram/starfive/ddrphy_start.c
@@ -4,7 +4,6 @@
 * Author: Yanhong Wang<yanhong.wang@starfivetech.com>
 */

-#include <common.h>
 #include <asm/io.h>

 #include "starfive_ddr.h"
--- a/drivers/ram/starfive/ddrphy_train.c
+++ b/drivers/ram/starfive/ddrphy_train.c
@@ -4,7 +4,7 @@
 * Author: Yanhong Wang<yanhong.wang@starfivetech.com>
 */

-#include <common.h>
+#include <linux/kernel.h>
 #include <asm/io.h>

 static const u32 ddr_train_data[] = {
--- a/drivers/ram/starfive/ddrphy_utils.c
+++ b/drivers/ram/starfive/ddrphy_utils.c
@@ -4,7 +4,7 @@
 * Author: Yanhong Wang<yanhong.wang@starfivetech.com>
 */

-#include <common.h>
+#include <linux/kernel.h>
 #include <asm/io.h>

 static const  u32 ddr_phy_data[] = {
--- a/drivers/ram/starfive/starfive_ddr.c
+++ b/drivers/ram/starfive/starfive_ddr.c
@@ -4,7 +4,6 @@
 * Author: Yanhong Wang<yanhong.wang@starfivetech.com>
 */

-#include <common.h>
 #include <asm/arch/regs.h>
 #include <asm/io.h>
 #include <clk.h>
--- a/drivers/ram/starfive/starfive_ddr.h
+++ b/drivers/ram/starfive/starfive_ddr.h
@@ -7,6 +7,8 @@
 #ifndef __STARFIVE_DDR_H__
 #define __STARFIVE_DDR_H__

+#include <linux/kernel.h>
+
 #define SEC_CTRL_ADDR		0x1000
 #define PHY_BASE_ADDR		0x800
 #define PHY_AC_BASE_ADDR	0x1000
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -6,7 +6,6 @@

 #define LOG_CATEGORY UCLASS_RAM

-#include <common.h>
 #include <clk.h>
 #include <dm.h>
 #include <init.h>
--- a/drivers/ram/stm32mp1/stm32mp1_ddr.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c
@@ -5,7 +5,6 @@

 #define LOG_CATEGORY UCLASS_RAM

-#include <common.h>
 #include <clk.h>
 #include <log.h>
 #include <ram.h>
--- a/drivers/ram/stm32mp1/stm32mp1_interactive.c
+++ b/drivers/ram/stm32mp1/stm32mp1_interactive.c
@@ -5,7 +5,6 @@

 #define LOG_CATEGORY UCLASS_RAM

-#include <common.h>
 #include <command.h>
 #include <console.h>
 #include <cli.h>
--- a/drivers/ram/stm32mp1/stm32mp1_ram.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ram.c
@@ -5,7 +5,6 @@

 #define LOG_CATEGORY UCLASS_RAM

-#include <common.h>
 #include <clk.h>
 #include <dm.h>
 #include <init.h>
--- a/drivers/ram/stm32mp1/stm32mp1_tests.c
+++ b/drivers/ram/stm32mp1/stm32mp1_tests.c
@@ -5,7 +5,6 @@

 #define LOG_CATEGORY UCLASS_RAM

-#include <common.h>
 #include <console.h>
 #include <init.h>
 #include <log.h>
--- a/drivers/ram/sunxi/dram_sun20i_d1.c
+++ b/drivers/ram/sunxi/dram_sun20i_d1.c
@@ -13,7 +13,7 @@
 */

 #include <asm/io.h>
-#include <common.h>
+#include <config.h>
 #ifdef CONFIG_RAM
  #include <dm.h>
  #include <ram.h>