Merge branch 'next'
Bring in the following merges: commit8fbbec12f7
Merge:87f69f467a
63618e71e8
Author: Tom Rini <trini@konsulko.com> Date: Fri Jan 3 09:48:47 2020 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next - updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support commit87f69f467a
Merge:c0912f9bbf
4466b99703
Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 24 08:18:19 2019 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx into next - Enable DM driver on ppc/km boards - Enable DM_USB for some of NXP powerpc platforms: P5040, T4240, T208x, T104x, P4080, P2041, P2020, P1020, P3041 - Some updates in mpc85xx-ddr driver, km boards commitc0912f9bbf
Merge:533c9f5714
a1d6dc3f84
Author: Tom Rini <trini@konsulko.com> Date: Wed Dec 18 07:20:19 2019 -0500 Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next - Various x86 common codes updated for TPL/SPL - I2C designware driver updated for PCI - ICH SPI driver updated to support Apollo Lake - Add Intel FSP2 base support - Intel Apollo Lake platform specific drivers support - Add a new board Google Chromebook Coral commit533c9f5714
Merge:553cb06887
033e18b47b
Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 17 07:53:08 2019 -0500 Merge tag '20191217-for-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next i2c: for next - misc: i2c_eeprom: Add partition support and add ability to query size of eeprom device and partitions - i2c common: add support for offset overflow in to address and add sandbox tests for it. commit553cb06887
Merge:f39abbbc53
b4f98b3b16
Author: Tom Rini <trini@konsulko.com> Date: Thu Dec 12 08:18:59 2019 -0500 Merge tag 'dm-next-13dec19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next buildman improvements including toolchain environment feature sandbox unicode support in serial
This commit is contained in:
@@ -370,6 +370,8 @@ step2:
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debug("Setting DEBUG_3[21] to 0x%08x\n", in_be32(&ddr->debug[2]));
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#endif /* part 1 of the workaound */
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/* Always start in self-refresh, clear after MEM_EN */
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setbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_FRC_SR);
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/*
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* 500 painful micro-seconds must elapse between
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@@ -382,8 +384,6 @@ step2:
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#ifdef CONFIG_DEEP_SLEEP
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if (is_warm_boot()) {
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/* enter self-refresh */
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setbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_FRC_SR);
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/* do board specific memory setup */
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board_mem_sleep_setup();
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temp_sdram_cfg = (in_be32(&ddr->sdram_cfg) | SDRAM_CFG_BI);
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@@ -395,6 +395,10 @@ step2:
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out_be32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN);
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asm volatile("sync;isync");
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/* Exit self-refresh after DDR conf as some ddr memories can fail. */
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clrbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_FRC_SR);
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asm volatile("sync;isync");
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total_gb_size_per_controller = 0;
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for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
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if (!(regs->cs[i].config & 0x80000000))
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@@ -544,9 +548,4 @@ step2:
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clrbits_be32(&ddr->sdram_cfg, 0x2);
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}
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#endif /* CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134 */
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#ifdef CONFIG_DEEP_SLEEP
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if (is_warm_boot())
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/* exit self-refresh */
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clrbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_FRC_SR);
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#endif
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}
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