driver/ddr/fsl: Add workaround for erratum A-009801
The initial training for the DDRC may provide results that are not optimized. The workaround provides better read timing margins. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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@@ -189,6 +189,10 @@ typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t;
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#define DDR_MR5_CA_PARITY_LAT_4_CLK 0x1 /* for DDR4-1600/1866/2133 */
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#define DDR_MR5_CA_PARITY_LAT_5_CLK 0x2 /* for DDR4-2400 */
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/* DEBUG_26 register */
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#define DDR_CAS_TO_PRE_SUB_MASK 0x0000f000 /* CAS to preamble subtract value */
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#define DDR_CAS_TO_PRE_SUB_SHIFT 12
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/* DEBUG_29 register */
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#define DDR_TX_BD_DIS (1 << 10) /* Transmit Bit Deskew Disable */
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