drivers: pinctrl: Remove duplicate newlines
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This commit is contained in:
@@ -92,7 +92,6 @@ struct exynos_pinctrl_config_data {
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const unsigned int value;
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const unsigned int value;
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};
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};
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void exynos_pinctrl_setup_peri(struct exynos_pinctrl_config_data *conf,
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void exynos_pinctrl_setup_peri(struct exynos_pinctrl_config_data *conf,
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unsigned int num_conf, unsigned long base);
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unsigned int num_conf, unsigned long base);
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int exynos_pinctrl_set_state(struct udevice *dev,
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int exynos_pinctrl_set_state(struct udevice *dev,
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@@ -729,7 +729,6 @@ static int armada_37xx_pinctrl_probe(struct udevice *dev)
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if (!info->funcs)
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if (!info->funcs)
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return -ENOMEM;
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return -ENOMEM;
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ret = armada_37xx_fill_group(info);
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ret = armada_37xx_fill_group(info);
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if (ret)
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if (ret)
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return ret;
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return ret;
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@@ -208,7 +208,6 @@ void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
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generic_clear_bit(bit, sysconfreg);
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generic_clear_bit(bit, sysconfreg);
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}
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}
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static int sti_pinctrl_set_state(struct udevice *dev, struct udevice *config)
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static int sti_pinctrl_set_state(struct udevice *dev, struct udevice *config)
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{
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{
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struct fdtdec_phandle_args args;
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struct fdtdec_phandle_args args;
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@@ -114,7 +114,6 @@ struct pic32_reg_in_mux {
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#define PPS_OUT(__port, __pin) \
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#define PPS_OUT(__port, __pin) \
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(((__port) * PIC32_PINS_PER_PORT + (__pin)) << 2)
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(((__port) * PIC32_PINS_PER_PORT + (__pin)) << 2)
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struct pic32_pinctrl_priv {
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struct pic32_pinctrl_priv {
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struct pic32_reg_in_mux *mux_in; /* mux input function */
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struct pic32_reg_in_mux *mux_in; /* mux input function */
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struct pic32_reg_port *pinconf; /* pin configuration*/
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struct pic32_reg_port *pinconf; /* pin configuration*/
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@@ -250,7 +250,6 @@
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_0 FM(AVS1)
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#define GPSR7_0 FM(AVS1)
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/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
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/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
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#define IP0_3_0 FM(AVB_MDC) F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_3_0 FM(AVB_MDC) F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_7_4 FM(AVB_MAGIC) F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_7_4 FM(AVB_MAGIC) F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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@@ -256,7 +256,6 @@
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_0 FM(AVS1)
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#define GPSR7_0 FM(AVS1)
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/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
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/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
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#define IP0_3_0 FM(AVB_MDC) F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_3_0 FM(AVB_MDC) F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_7_4 FM(AVB_MAGIC) F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_7_4 FM(AVB_MAGIC) F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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@@ -256,7 +256,6 @@
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_0 FM(AVS1)
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#define GPSR7_0 FM(AVS1)
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/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
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/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
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#define IP0_3_0 FM(AVB_MDC) F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_3_0 FM(AVB_MDC) F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_7_4 FM(AVB_MAGIC) F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_7_4 FM(AVB_MAGIC) F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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@@ -160,7 +160,6 @@
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#define GPSR5_1 FM(QSPI0_MOSI_IO0)
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#define GPSR5_1 FM(QSPI0_MOSI_IO0)
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#define GPSR5_0 FM(QSPI0_SPCLK)
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#define GPSR5_0 FM(QSPI0_SPCLK)
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/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 - F */
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/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 - F */
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#define IP0_3_0 FM(DU_DR2) FM(HSCK0) F_(0, 0) FM(A0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_3_0 FM(DU_DR2) FM(HSCK0) F_(0, 0) FM(A0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_7_4 FM(DU_DR3) FM(HRTS0_N) F_(0, 0) FM(A1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_7_4 FM(DU_DR3) FM(HRTS0_N) F_(0, 0) FM(A1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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@@ -194,7 +194,6 @@
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#define GPSR5_1 FM(QSPI0_MOSI_IO0)
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#define GPSR5_1 FM(QSPI0_MOSI_IO0)
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#define GPSR5_0 FM(QSPI0_SPCLK)
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#define GPSR5_0 FM(QSPI0_SPCLK)
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/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 - F */
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/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 - F */
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#define IP0_3_0 FM(DU_DR2) FM(SCK4) FM(GETHER_RMII_CRS_DV) FM(A0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_3_0 FM(DU_DR2) FM(SCK4) FM(GETHER_RMII_CRS_DV) FM(A0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_7_4 FM(DU_DR3) FM(RX4) FM(GETHER_RMII_RX_ER) FM(A1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0_7_4 FM(DU_DR3) FM(RX4) FM(GETHER_RMII_RX_ER) FM(A1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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@@ -428,7 +428,6 @@ FM(IP12_31_28) IP12_31_28 \
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#define MOD_SEL1_27 FM(SEL_SCIF0_0) FM(SEL_SCIF0_1)
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#define MOD_SEL1_27 FM(SEL_SCIF0_0) FM(SEL_SCIF0_1)
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#define MOD_SEL1_26 FM(SEL_SSIF4_0) FM(SEL_SSIF4_1)
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#define MOD_SEL1_26 FM(SEL_SSIF4_0) FM(SEL_SSIF4_1)
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#define PINMUX_MOD_SELS \
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#define PINMUX_MOD_SELS \
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\
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\
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MOD_SEL1_31 \
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MOD_SEL1_31 \
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@@ -2870,7 +2869,6 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
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{ /* sentinel */ }
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{ /* sentinel */ }
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};
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};
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static int r8a77995_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
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static int r8a77995_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
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{
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{
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switch (pin) {
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switch (pin) {
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@@ -654,7 +654,6 @@ static const unsigned int i2c5_mux[] = {
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SDA5_MARK, SCL5_MARK,
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SDA5_MARK, SCL5_MARK,
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};
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};
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/* - INTC-EX ---------------------------------------------------------------- */
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/* - INTC-EX ---------------------------------------------------------------- */
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static const unsigned int intc_ex_irq0_pins[] = {
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static const unsigned int intc_ex_irq0_pins[] = {
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/* IRQ0 */
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/* IRQ0 */
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@@ -261,7 +261,6 @@
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#define GPSR7_1 F_(AVB0_AVTP_CAPTURE, IP0SR7_7_4)
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#define GPSR7_1 F_(AVB0_AVTP_CAPTURE, IP0SR7_7_4)
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#define GPSR7_0 F_(AVB0_AVTP_PPS, IP0SR7_3_0)
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#define GPSR7_0 F_(AVB0_AVTP_PPS, IP0SR7_3_0)
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/* SR0 */
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/* SR0 */
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/* IP0SR0 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
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/* IP0SR0 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
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#define IP0SR0_3_0 F_(0, 0) FM(ERROROUTC_N_B) FM(TCLK2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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#define IP0SR0_3_0 F_(0, 0) FM(ERROROUTC_N_B) FM(TCLK2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
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@@ -947,7 +947,6 @@ static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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return 0;
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return 0;
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}
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}
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static int sh_pfc_pinctrl_probe(struct udevice *dev)
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static int sh_pfc_pinctrl_probe(struct udevice *dev)
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{
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{
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struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev);
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struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev);
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@@ -32,7 +32,6 @@ static const struct pmux_pingrp_config disp1_default[] = {
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PINMUX(SLXD, SPDIF, NORMAL, NORMAL),
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PINMUX(SLXD, SPDIF, NORMAL, NORMAL),
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};
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};
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int funcmux_select(enum periph_id id, int config)
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int funcmux_select(enum periph_id id, int config)
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{
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{
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int bad_config = config != FUNCMUX_DEFAULT;
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int bad_config = config != FUNCMUX_DEFAULT;
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