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board: freescale: p1_p2_rdb_pc: Use named macros for i2c bus num and address

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Replace hardcoded boot i2c bus num and address by existing macros when
generating env for CONFIG_EXTRA_ENV_SETTINGS.

Same macros are used in U-Boot board code when reading information from
boot i2c data.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Pali Rohár
2022-04-07 12:16:21 +02:00
committed by Priyanka Jain
parent ac56055c41
commit 6496a89a57
1 changed files with 12 additions and 12 deletions
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24
include/configs/p1_p2_rdb_pc.h
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@@ -535,28 +535,28 @@
#ifdef __SW_BOOT_NOR #ifdef __SW_BOOT_NOR
#define __NOR_RST_CMD \ #define __NOR_RST_CMD \
norboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_NOR 1; \ norboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_NOR 1; \
i2c mw 18 3 __SW_BOOT_MASK 1; reset i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
#endif #endif
#ifdef __SW_BOOT_SPI #ifdef __SW_BOOT_SPI
#define __SPI_RST_CMD \ #define __SPI_RST_CMD \
spiboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_SPI 1; \ spiboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_SPI 1; \
i2c mw 18 3 __SW_BOOT_MASK 1; reset i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
#endif #endif
#ifdef __SW_BOOT_SD #ifdef __SW_BOOT_SD
#define __SD_RST_CMD \ #define __SD_RST_CMD \
sdboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_SD 1; \ sdboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_SD 1; \
i2c mw 18 3 __SW_BOOT_MASK 1; reset i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
#endif #endif
#ifdef __SW_BOOT_NAND #ifdef __SW_BOOT_NAND
#define __NAND_RST_CMD \ #define __NAND_RST_CMD \
nandboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_NAND 1; \ nandboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_NAND 1; \
i2c mw 18 3 __SW_BOOT_MASK 1; reset i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
#endif #endif
#ifdef __SW_BOOT_PCIE #ifdef __SW_BOOT_PCIE
#define __PCIE_RST_CMD \ #define __PCIE_RST_CMD \
pciboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_PCIE 1; \ pciboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_PCIE 1; \
i2c mw 18 3 __SW_BOOT_MASK 1; reset i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
#endif #endif
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -583,9 +583,9 @@ i2c mw 18 3 __SW_BOOT_MASK 1; reset
"nandbootaddr=100000\0" \ "nandbootaddr=100000\0" \
"nandfdtaddr=80000\0" \ "nandfdtaddr=80000\0" \
"ramdisk_size=120000\0" \ "ramdisk_size=120000\0" \
"map_lowernorbank=i2c dev 1; i2c mw 18 1 02 1; i2c mw 18 3 fd 1\0" \
"map_uppernorbank=i2c dev 1; i2c mw 18 1 00 1; i2c mw 18 3 fd 1\0" \
__VSCFW_ADDR \ __VSCFW_ADDR \
"map_lowernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 02 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 fd 1\0" \
"map_uppernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 00 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 fd 1\0" \
__stringify(__NOR_RST_CMD)"\0" \ __stringify(__NOR_RST_CMD)"\0" \
__stringify(__SPI_RST_CMD)"\0" \ __stringify(__SPI_RST_CMD)"\0" \
__stringify(__SD_RST_CMD)"\0" \ __stringify(__SD_RST_CMD)"\0" \