board: freescale: p1_p2_rdb_pc: Use named macros for i2c bus num and address
Replace hardcoded boot i2c bus num and address by existing macros when generating env for CONFIG_EXTRA_ENV_SETTINGS. Same macros are used in U-Boot board code when reading information from boot i2c data. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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committed by
Priyanka Jain

parent
ac56055c41
commit
6496a89a57
@@ -535,28 +535,28 @@
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#ifdef __SW_BOOT_NOR
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#ifdef __SW_BOOT_NOR
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#define __NOR_RST_CMD \
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#define __NOR_RST_CMD \
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norboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_NOR 1; \
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norboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_NOR 1; \
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i2c mw 18 3 __SW_BOOT_MASK 1; reset
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i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
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#endif
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#endif
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#ifdef __SW_BOOT_SPI
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#ifdef __SW_BOOT_SPI
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#define __SPI_RST_CMD \
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#define __SPI_RST_CMD \
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spiboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_SPI 1; \
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spiboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_SPI 1; \
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i2c mw 18 3 __SW_BOOT_MASK 1; reset
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i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
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#endif
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#endif
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#ifdef __SW_BOOT_SD
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#ifdef __SW_BOOT_SD
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#define __SD_RST_CMD \
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#define __SD_RST_CMD \
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sdboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_SD 1; \
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sdboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_SD 1; \
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i2c mw 18 3 __SW_BOOT_MASK 1; reset
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i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
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#endif
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#endif
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#ifdef __SW_BOOT_NAND
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#ifdef __SW_BOOT_NAND
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#define __NAND_RST_CMD \
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#define __NAND_RST_CMD \
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nandboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_NAND 1; \
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nandboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_NAND 1; \
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i2c mw 18 3 __SW_BOOT_MASK 1; reset
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i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
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#endif
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#endif
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#ifdef __SW_BOOT_PCIE
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#ifdef __SW_BOOT_PCIE
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#define __PCIE_RST_CMD \
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#define __PCIE_RST_CMD \
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pciboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_PCIE 1; \
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pciboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_PCIE 1; \
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i2c mw 18 3 __SW_BOOT_MASK 1; reset
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i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
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#endif
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#endif
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#define CONFIG_EXTRA_ENV_SETTINGS \
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#define CONFIG_EXTRA_ENV_SETTINGS \
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@@ -583,9 +583,9 @@ i2c mw 18 3 __SW_BOOT_MASK 1; reset
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"nandbootaddr=100000\0" \
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"nandbootaddr=100000\0" \
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"nandfdtaddr=80000\0" \
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"nandfdtaddr=80000\0" \
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"ramdisk_size=120000\0" \
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"ramdisk_size=120000\0" \
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"map_lowernorbank=i2c dev 1; i2c mw 18 1 02 1; i2c mw 18 3 fd 1\0" \
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"map_uppernorbank=i2c dev 1; i2c mw 18 1 00 1; i2c mw 18 3 fd 1\0" \
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__VSCFW_ADDR \
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__VSCFW_ADDR \
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"map_lowernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 02 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 fd 1\0" \
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"map_uppernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 00 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 fd 1\0" \
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__stringify(__NOR_RST_CMD)"\0" \
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__stringify(__NOR_RST_CMD)"\0" \
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__stringify(__SPI_RST_CMD)"\0" \
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__stringify(__SPI_RST_CMD)"\0" \
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__stringify(__SD_RST_CMD)"\0" \
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__stringify(__SD_RST_CMD)"\0" \
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