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net: gem: ignore tx_clk if MII is used

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If the MII interface is used, the PHY is the clock master, thus don't
set the clock rate. On Zynq-7000, this will prevent the following
error:
  zynq_gem ethernet@e000b000: failed to set tx clock rate 25000000

Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Link: https://lore.kernel.org/r/20250415150400.136723-1-martin.kaistra@linutronix.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Martin Kaistra
2025-04-15 17:04:00 +02:00
committed by Michal Simek
parent 90df44fb4f
commit 6759bd73e9
1 changed files with 8 additions and 6 deletions
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2
drivers/net/zynq_gem.c
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@@ -567,6 +567,7 @@ static int zynq_gem_init(struct udevice *dev)
}
#endif
if (priv->interface != PHY_INTERFACE_MODE_MII) {
ret = clk_get_rate(&priv->tx_clk);
if (ret != clk_rate) {
ret = clk_set_rate(&priv->tx_clk, clk_rate);
@@ -575,6 +576,7 @@ static int zynq_gem_init(struct udevice *dev)
return ret;
}
}
}
ret = clk_enable(&priv->tx_clk);
if (ret) {