Merge branch 'master' of git://source.denx.de/u-boot-usb
This commit is contained in:
12
README
12
README
@@ -482,18 +482,6 @@ The following options need to be configured:
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for your device
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for your device
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- CONFIG_USBD_PRODUCTID 0xFFFF
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- CONFIG_USBD_PRODUCTID 0xFFFF
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- ULPI Layer Support:
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The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
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the generic ULPI layer. The generic layer accesses the ULPI PHY
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via the platform viewport, so you need both the genric layer and
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the viewport enabled. Currently only Chipidea/ARC based
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viewport is supported.
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To enable the ULPI layer support, define CONFIG_USB_ULPI and
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CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
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If your ULPI phy needs a different reference clock than the
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standard 24 MHz then you have to define CFG_ULPI_REF_CLK to
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the appropriate value in Hz.
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- MMC Support:
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- MMC Support:
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CONFIG_SH_MMCIF
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CONFIG_SH_MMCIF
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Support for Renesas on-chip MMCIF controller
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Support for Renesas on-chip MMCIF controller
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@@ -1,27 +0,0 @@
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Reference code ""drivers/usb/ulpi/omap-ulpi-viewport.c"
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Contains the ulpi read write api's to perform
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any ulpi phy port access on omap platform.
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On omap ehci reg map contains INSNREG05_ULPI
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register which offers the ulpi phy access so
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any ulpi phy commands should be passsed using this
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register.
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omap-ulpi-viewport.c is a low level function
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implementation of "drivers/usb/ulpi/ulpi.c"
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To enable and use omap-ulpi-viewport.c
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we require CONFIG_USB_ULPI_VIEWPORT_OMAP and
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CONFIG_USB_ULPI be enabled in config file.
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Any ulpi ops request can be done with ulpi.c
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and soc specific binding and usage is done with
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omap-ulpi-viewport implementation.
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Ex: scenario:
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omap-ehci driver code requests for ulpi phy reset if
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ehci is used in phy mode, which will call ulpi phy reset
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the ulpi phy reset does ulpi_read/write from viewport
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implementation which will do ulpi reset using the
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INSNREG05_ULPI register.
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@@ -23,6 +23,7 @@
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-mapping.h>
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#include <linux/err.h>
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#include <linux/err.h>
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#include <linux/iopoll.h>
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#include <linux/ioport.h>
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#include <linux/ioport.h>
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#include <dm.h>
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#include <dm.h>
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#include <generic-phy.h>
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#include <generic-phy.h>
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@@ -587,7 +588,6 @@ static void dwc3_set_incr_burst_type(struct dwc3 *dwc)
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*/
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*/
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static int dwc3_core_init(struct dwc3 *dwc)
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static int dwc3_core_init(struct dwc3 *dwc)
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{
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{
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unsigned long timeout;
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u32 hwparams4 = dwc->hwparams.hwparams4;
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u32 hwparams4 = dwc->hwparams.hwparams4;
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u32 reg;
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u32 reg;
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int ret;
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int ret;
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@@ -610,15 +610,11 @@ static int dwc3_core_init(struct dwc3 *dwc)
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}
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}
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/* issue device SoftReset too */
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/* issue device SoftReset too */
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timeout = 5000;
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dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
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dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
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while (timeout--) {
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ret = read_poll_timeout(dwc3_readl, reg,
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reg = dwc3_readl(dwc->regs, DWC3_DCTL);
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!(reg & DWC3_DCTL_CSFTRST),
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if (!(reg & DWC3_DCTL_CSFTRST))
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1, 5000, dwc->regs, DWC3_DCTL);
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break;
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if (ret) {
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};
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if (!timeout) {
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dev_err(dwc->dev, "Reset Timed Out\n");
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dev_err(dwc->dev, "Reset Timed Out\n");
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ret = -ETIMEDOUT;
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ret = -ETIMEDOUT;
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goto err0;
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goto err0;
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@@ -262,7 +262,7 @@ endif
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config USB_EHCI_MSM
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config USB_EHCI_MSM
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bool "Support for Qualcomm on-chip EHCI USB controller"
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bool "Support for Qualcomm on-chip EHCI USB controller"
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depends on DM_USB
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depends on DM_USB
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select USB_ULPI_VIEWPORT
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select USB_ULPI
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select MSM8916_USB_PHY
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select MSM8916_USB_PHY
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---help---
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---help---
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Enables support for the on-chip EHCI controller on Qualcomm
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Enables support for the on-chip EHCI controller on Qualcomm
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@@ -279,7 +279,10 @@ config USB_EHCI_TEGRA
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depends on ARCH_TEGRA
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depends on ARCH_TEGRA
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select USB_EHCI_IS_TDI
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select USB_EHCI_IS_TDI
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---help---
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---help---
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Enable support for Tegra on-chip EHCI USB controller
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Enable support for Tegra on-chip EHCI USB controller. If you enable
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ULPI and your PHY needs a different reference clock than the standard
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24 MHz then you have to define CFG_ULPI_REF_CLK to the appropriate
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value in Hz.
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config USB_EHCI_ZYNQ
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config USB_EHCI_ZYNQ
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bool "Support for Xilinx Zynq on-chip EHCI USB controller"
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bool "Support for Xilinx Zynq on-chip EHCI USB controller"
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@@ -25,13 +25,6 @@
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#define HOSTPC1_DEVLC 0x84
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#define HOSTPC1_DEVLC 0x84
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#define HOSTPC1_PSPD(x) (((x) >> 25) & 0x3)
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#define HOSTPC1_PSPD(x) (((x) >> 25) & 0x3)
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#ifdef CONFIG_USB_ULPI
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#ifndef CONFIG_USB_ULPI_VIEWPORT
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#error "To use CONFIG_USB_ULPI on Tegra Boards you have to also \
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define CONFIG_USB_ULPI_VIEWPORT"
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#endif
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#endif
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/* Parameters we need for USB */
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/* Parameters we need for USB */
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enum {
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enum {
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PARAM_DIVN, /* PLL FEEDBACK DIVIDer */
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PARAM_DIVN, /* PLL FEEDBACK DIVIDer */
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@@ -1,8 +1,18 @@
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comment "ULPI drivers"
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comment "ULPI drivers"
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config USB_ULPI
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bool "ULPI support"
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depends on USB_HOST
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help
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Select to commnicate with USB PHY via ULPI interface.
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The ULPI (UTMI Low Pin (count) Interface) is a wrapper on UTMI+ core
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that is used as PHY Transreceiver for USB controllers.
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This driver uses ULPI viewports that are specific for each SoC.
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choice
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choice
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prompt "ULPI Viewport type"
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prompt "ULPI Viewport type"
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optional
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depends on USB_ULPI
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help
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help
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Select ULPI viewport (SoC-side interface to ULPI) implementation
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Select ULPI viewport (SoC-side interface to ULPI) implementation
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appropriate for the device if you want to communicate with
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appropriate for the device if you want to communicate with
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@@ -10,23 +20,9 @@ choice
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config USB_ULPI_VIEWPORT
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config USB_ULPI_VIEWPORT
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bool "Generic ULPI Viewport"
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bool "Generic ULPI Viewport"
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depends on USB_ULPI
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help
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help
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Support generic ULPI Viewport implementation that is used on
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Support generic ULPI Viewport implementation that is used on
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some Tegra and Snapdragon devices.
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some Tegra and Snapdragon devices.
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config USB_ULPI_VIEWPORT_OMAP
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bool "OMAP ULPI Viewport"
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help
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Support ULPI Viewport implementation that is used on OMAP devices.
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endchoice
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endchoice
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config USB_ULPI
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bool "ULPI support"
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depends on (USB_ULPI_VIEWPORT || USB_ULPI_VIEWPORT_OMAP)
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help
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Select to commnicate with USB PHY via ULPI interface.
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ULPI is wrapper on UTMI+ core that is used as
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PHY Transreceiver for USB controllers.
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This driver uses ULPI viewports that are specific for each SoC.
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@@ -4,4 +4,3 @@
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obj-$(CONFIG_USB_ULPI) += ulpi.o
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obj-$(CONFIG_USB_ULPI) += ulpi.o
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obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi-viewport.o
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obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi-viewport.o
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obj-$(CONFIG_USB_ULPI_VIEWPORT_OMAP) += omap-ulpi-viewport.o
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@@ -1,71 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* OMAP ulpi viewport support
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* Based on drivers/usb/ulpi/ulpi-viewport.c
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*
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* Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com
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* Author: Govindraj R <govindraj.raja@ti.com>
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*/
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#include <log.h>
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#include <asm/io.h>
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#include <linux/delay.h>
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#include <usb/ulpi.h>
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#define OMAP_ULPI_WR_OPSEL (2 << 22)
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#define OMAP_ULPI_RD_OPSEL (3 << 22)
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#define OMAP_ULPI_START (1 << 31)
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/*
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* Wait for having ulpi in done state
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*/
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static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask)
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{
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int timeout = CFG_USB_ULPI_TIMEOUT;
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while (--timeout) {
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if (!(readl(ulpi_vp->viewport_addr) & mask))
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return 0;
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udelay(1);
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}
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return ULPI_ERROR;
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}
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/*
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* Issue a ULPI read/write request
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*/
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static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32 value)
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{
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int err;
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writel(value, ulpi_vp->viewport_addr);
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err = ulpi_wait(ulpi_vp, OMAP_ULPI_START);
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if (err)
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debug("ULPI request timed out\n");
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return err;
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}
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int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
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{
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u32 val = OMAP_ULPI_START | (((ulpi_vp->port_num + 1) & 0xf) << 24) |
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OMAP_ULPI_WR_OPSEL | ((u32)reg << 16) | (value & 0xff);
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return ulpi_request(ulpi_vp, val);
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}
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u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
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{
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int err;
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u32 val = OMAP_ULPI_START | (((ulpi_vp->port_num + 1) & 0xf) << 24) |
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OMAP_ULPI_RD_OPSEL | ((u32)reg << 16);
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err = ulpi_request(ulpi_vp, val);
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if (err)
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return err;
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return readl(ulpi_vp->viewport_addr) & 0xff;
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}
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