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Merge branch 'master' of git://source.denx.de/u-boot-usb

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This commit is contained in:
Tom Rini
2025-05-25 18:01:54 -06:00
parent 92da174fc6 831a38483c
commit 6c6252c4d6
8 changed files with 22 additions and 145 deletions
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12
README
View File

@@ -482,18 +482,6 @@ The following options need to be configured:
for your device
- CONFIG_USBD_PRODUCTID 0xFFFF
- ULPI Layer Support:
The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
the generic ULPI layer. The generic layer accesses the ULPI PHY
via the platform viewport, so you need both the genric layer and
the viewport enabled. Currently only Chipidea/ARC based
viewport is supported.
To enable the ULPI layer support, define CONFIG_USB_ULPI and
CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
If your ULPI phy needs a different reference clock than the
standard 24 MHz then you have to define CFG_ULPI_REF_CLK to
the appropriate value in Hz.
- MMC Support:
CONFIG_SH_MMCIF
Support for Renesas on-chip MMCIF controller

27
doc/README.omap-ulpi-viewport
View File

@@ -1,27 +0,0 @@
Reference code ""drivers/usb/ulpi/omap-ulpi-viewport.c"
Contains the ulpi read write api's to perform
any ulpi phy port access on omap platform.
On omap ehci reg map contains INSNREG05_ULPI
register which offers the ulpi phy access so
any ulpi phy commands should be passsed using this
register.
omap-ulpi-viewport.c is a low level function
implementation of "drivers/usb/ulpi/ulpi.c"
To enable and use omap-ulpi-viewport.c
we require CONFIG_USB_ULPI_VIEWPORT_OMAP and
CONFIG_USB_ULPI be enabled in config file.
Any ulpi ops request can be done with ulpi.c
and soc specific binding and usage is done with
omap-ulpi-viewport implementation.
Ex: scenario:
omap-ehci driver code requests for ulpi phy reset if
ehci is used in phy mode, which will call ulpi phy reset
the ulpi phy reset does ulpi_read/write from viewport
implementation which will do ulpi reset using the
INSNREG05_ULPI register.

14
drivers/usb/dwc3/core.c
View File

@@ -23,6 +23,7 @@
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/err.h>
#include <linux/iopoll.h>
#include <linux/ioport.h>
#include <dm.h>
#include <generic-phy.h>
@@ -587,7 +588,6 @@ static void dwc3_set_incr_burst_type(struct dwc3 *dwc)
*/
static int dwc3_core_init(struct dwc3 *dwc)
{
unsigned long timeout;
u32 hwparams4 = dwc->hwparams.hwparams4;
u32 reg;
int ret;
@@ -610,15 +610,11 @@ static int dwc3_core_init(struct dwc3 *dwc)
}
/* issue device SoftReset too */
timeout = 5000;
dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
while (timeout--) {
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
if (!(reg & DWC3_DCTL_CSFTRST))
break;
};
if (!timeout) {
ret = read_poll_timeout(dwc3_readl, reg,
!(reg & DWC3_DCTL_CSFTRST),
1, 5000, dwc->regs, DWC3_DCTL);
if (ret) {
dev_err(dwc->dev, "Reset Timed Out\n");
ret = -ETIMEDOUT;
goto err0;

7
drivers/usb/host/Kconfig
View File

@@ -262,7 +262,7 @@ endif
config USB_EHCI_MSM
bool "Support for Qualcomm on-chip EHCI USB controller"
depends on DM_USB
select USB_ULPI_VIEWPORT
select USB_ULPI
select MSM8916_USB_PHY
---help---
Enables support for the on-chip EHCI controller on Qualcomm
@@ -279,7 +279,10 @@ config USB_EHCI_TEGRA
depends on ARCH_TEGRA
select USB_EHCI_IS_TDI
---help---
Enable support for Tegra on-chip EHCI USB controller
Enable support for Tegra on-chip EHCI USB controller. If you enable
ULPI and your PHY needs a different reference clock than the standard
24 MHz then you have to define CFG_ULPI_REF_CLK to the appropriate
value in Hz.
config USB_EHCI_ZYNQ
bool "Support for Xilinx Zynq on-chip EHCI USB controller"

7
drivers/usb/host/ehci-tegra.c
View File

@@ -25,13 +25,6 @@
#define HOSTPC1_DEVLC 0x84
#define HOSTPC1_PSPD(x) (((x) >> 25) & 0x3)
#ifdef CONFIG_USB_ULPI
#ifndef CONFIG_USB_ULPI_VIEWPORT
#error "To use CONFIG_USB_ULPI on Tegra Boards you have to also \
define CONFIG_USB_ULPI_VIEWPORT"
#endif
#endif
/* Parameters we need for USB */
enum {
PARAM_DIVN, /* PLL FEEDBACK DIVIDer */

28
drivers/usb/ulpi/Kconfig
View File

@@ -1,8 +1,18 @@
comment "ULPI drivers"
config USB_ULPI
bool "ULPI support"
depends on USB_HOST
help
Select to commnicate with USB PHY via ULPI interface.
The ULPI (UTMI Low Pin (count) Interface) is a wrapper on UTMI+ core
that is used as PHY Transreceiver for USB controllers.
This driver uses ULPI viewports that are specific for each SoC.
choice
prompt "ULPI Viewport type"
optional
depends on USB_ULPI
help
Select ULPI viewport (SoC-side interface to ULPI) implementation
appropriate for the device if you want to communicate with
@@ -10,23 +20,9 @@ choice
config USB_ULPI_VIEWPORT
bool "Generic ULPI Viewport"
depends on USB_ULPI
help
Support generic ULPI Viewport implementation that is used on
some Tegra and Snapdragon devices.
config USB_ULPI_VIEWPORT_OMAP
bool "OMAP ULPI Viewport"
help
Support ULPI Viewport implementation that is used on OMAP devices.
endchoice
config USB_ULPI
bool "ULPI support"
depends on (USB_ULPI_VIEWPORT || USB_ULPI_VIEWPORT_OMAP)
help
Select to commnicate with USB PHY via ULPI interface.
ULPI is wrapper on UTMI+ core that is used as
PHY Transreceiver for USB controllers.
This driver uses ULPI viewports that are specific for each SoC.

1
drivers/usb/ulpi/Makefile
View File

@@ -4,4 +4,3 @@
obj-$(CONFIG_USB_ULPI) += ulpi.o
obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi-viewport.o
obj-$(CONFIG_USB_ULPI_VIEWPORT_OMAP) += omap-ulpi-viewport.o

71
drivers/usb/ulpi/omap-ulpi-viewport.c
View File

@@ -1,71 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* OMAP ulpi viewport support
* Based on drivers/usb/ulpi/ulpi-viewport.c
*
* Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com
* Author: Govindraj R <govindraj.raja@ti.com>
*/
#include <log.h>
#include <asm/io.h>
#include <linux/delay.h>
#include <usb/ulpi.h>
#define OMAP_ULPI_WR_OPSEL (2 << 22)
#define OMAP_ULPI_RD_OPSEL (3 << 22)
#define OMAP_ULPI_START (1 << 31)
/*
* Wait for having ulpi in done state
*/
static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask)
{
int timeout = CFG_USB_ULPI_TIMEOUT;
while (--timeout) {
if (!(readl(ulpi_vp->viewport_addr) & mask))
return 0;
udelay(1);
}
return ULPI_ERROR;
}
/*
* Issue a ULPI read/write request
*/
static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32 value)
{
int err;
writel(value, ulpi_vp->viewport_addr);
err = ulpi_wait(ulpi_vp, OMAP_ULPI_START);
if (err)
debug("ULPI request timed out\n");
return err;
}
int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
{
u32 val = OMAP_ULPI_START | (((ulpi_vp->port_num + 1) & 0xf) << 24) |
OMAP_ULPI_WR_OPSEL | ((u32)reg << 16) | (value & 0xff);
return ulpi_request(ulpi_vp, val);
}
u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
{
int err;
u32 val = OMAP_ULPI_START | (((ulpi_vp->port_num + 1) & 0xf) << 24) |
OMAP_ULPI_RD_OPSEL | ((u32)reg << 16);
err = ulpi_request(ulpi_vp, val);
if (err)
return err;
return readl(ulpi_vp->viewport_addr) & 0xff;
}