riscv: cpu: k230: Add support for Canaan Kendryte K230 SoC
Add Canaan K230 SoC with sysreset support, running without cache enabled. Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
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committed by
Leo Yu-Chi Liang

parent
a1135b7526
commit
78d9ce3e36
@@ -14,6 +14,9 @@ config TARGET_ANDES_AE350
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config TARGET_BANANAPI_F3
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config TARGET_BANANAPI_F3
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bool "Support BananaPi F3 Board"
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bool "Support BananaPi F3 Board"
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config TARGET_K230_CANMV
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bool "Support K230 CanMV Board"
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config TARGET_LICHEERV_NANO
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config TARGET_LICHEERV_NANO
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bool "Support LicheeRV Nano Board"
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bool "Support LicheeRV Nano Board"
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@@ -91,6 +94,7 @@ config SPL_ZERO_MEM_BEFORE_USE
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# board-specific options below
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# board-specific options below
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source "board/andestech/ae350/Kconfig"
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source "board/andestech/ae350/Kconfig"
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source "board/aspeed/ibex_ast2700/Kconfig"
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source "board/aspeed/ibex_ast2700/Kconfig"
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source "board/canaan/k230_canmv/Kconfig"
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source "board/emulation/qemu-riscv/Kconfig"
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source "board/emulation/qemu-riscv/Kconfig"
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source "board/microchip/mpfs_icicle/Kconfig"
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source "board/microchip/mpfs_icicle/Kconfig"
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source "board/openpiton/riscv64/Kconfig"
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source "board/openpiton/riscv64/Kconfig"
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@@ -113,6 +117,7 @@ source "arch/riscv/cpu/ast2700/Kconfig"
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source "arch/riscv/cpu/generic/Kconfig"
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source "arch/riscv/cpu/generic/Kconfig"
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source "arch/riscv/cpu/jh7110/Kconfig"
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source "arch/riscv/cpu/jh7110/Kconfig"
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source "arch/riscv/cpu/k1/Kconfig"
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source "arch/riscv/cpu/k1/Kconfig"
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source "arch/riscv/cpu/k230/Kconfig"
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# architecture-specific options below
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# architecture-specific options below
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14
arch/riscv/cpu/k230/Kconfig
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14
arch/riscv/cpu/k230/Kconfig
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@@ -0,0 +1,14 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech>
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config CANAAN_K230
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bool
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select ARCH_EARLY_INIT_R
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select BINMAN
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imply CPU
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imply CPU_RISCV
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imply RISCV_TIMER
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imply CMD_CPU
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imply SYSRESET
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imply SYSRESET_SYSCON
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6
arch/riscv/cpu/k230/Makefile
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6
arch/riscv/cpu/k230/Makefile
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@@ -0,0 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech>
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obj-y += dram.o
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obj-y += cpu.o
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9
arch/riscv/cpu/k230/cpu.c
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9
arch/riscv/cpu/k230/cpu.c
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@@ -0,0 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech>
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*/
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int cleanup_before_linux(void)
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{
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return 0;
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}
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21
arch/riscv/cpu/k230/dram.c
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21
arch/riscv/cpu/k230/dram.c
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@@ -0,0 +1,21 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <asm/global_data.h>
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#include <fdtdec.h>
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#include <init.h>
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#include <linux/sizes.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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return fdtdec_setup_mem_size_base();
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}
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int dram_init_banksize(void)
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{
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return fdtdec_setup_memory_banksize();
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}
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