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stm32f7: use clock driver to enable qspi controller clock

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Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
This commit is contained in:
Vikas Manocha
2017-04-10 15:02:50 -07:00
committed by Tom Rini
parent 5bf5250e9d
commit 890bafd752
2 changed files with 16 additions and 1 deletions
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1
arch/arm/dts/stm32f746.dtsi
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@@ -78,6 +78,7 @@
reg-names = "QuadSPI", "QuadSPI-memory"; reg-names = "QuadSPI", "QuadSPI-memory";
interrupts = <92>; interrupts = <92>;
spi-max-frequency = <108000000>; spi-max-frequency = <108000000>;
clocks = <&rcc 0 65>;
status = "disabled"; status = "disabled";
}; };
usart1: serial@40011000 { usart1: serial@40011000 {

16
drivers/spi/stm32_qspi.c
View File

@@ -17,6 +17,7 @@
#include <errno.h> #include <errno.h>
#include <asm/arch/stm32.h> #include <asm/arch/stm32.h>
#include <asm/arch/stm32_defs.h> #include <asm/arch/stm32_defs.h>
#include <clk.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@@ -457,7 +458,20 @@ static int stm32_qspi_probe(struct udevice *bus)
priv->max_hz = plat->max_hz; priv->max_hz = plat->max_hz;
clock_setup(QSPI_CLOCK_CFG); #ifdef CONFIG_CLK
int ret;
struct clk clk;
ret = clk_get_by_index(bus, 0, &clk);
if (ret < 0)
return ret;
ret = clk_enable(&clk);
if (ret) {
dev_err(bus, "failed to enable clock\n");
return ret;
}
#endif
setbits_le32(&priv->regs->cr, STM32_QSPI_CR_SSHIFT); setbits_le32(&priv->regs->cr, STM32_QSPI_CR_SSHIFT);