arm: socfpga: Fix: Compile MCR instruction on ARM 32-bit only
MCR instruction only available in ARM 32-bit. So, compile MCR instruction when ARM 32-bit is enabled. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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committed by
Marek Vasut

parent
17b3f32dd0
commit
8c9f247a1a
@@ -19,6 +19,7 @@
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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void s_init(void) {
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void s_init(void) {
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#ifndef CONFIG_ARM64
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/*
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/*
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* Preconfigure ACTLR, make sure Write Full Line of Zeroes is disabled.
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* Preconfigure ACTLR, make sure Write Full Line of Zeroes is disabled.
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* This is optional on CycloneV / ArriaV.
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* This is optional on CycloneV / ArriaV.
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@@ -29,6 +30,7 @@ void s_init(void) {
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"isb\n"
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"isb\n"
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"dsb\n"
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"dsb\n"
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::"r"(0x0));
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::"r"(0x0));
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#endif
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}
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}
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/*
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/*
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