Coding style cleanup; update CHANGELOG

Signed-off-by: Wolfgang Denk <wd@denx.de>

board/digsy_mtc/cmd_mtc.c

@@ -346,5 +346,5 @@ U_BOOT_CMD(mtc, 5, 1, cmd_mtc,
 	" 'appreg'\n"
 	"digin [channel] - returns state of digital input (1 or 2)\n"
 	"digout <on|off> <on|off> - sets state of two digital outputs\n"
-	   "help [subcommand] - get help for subcommand\n");
-
+	"help [subcommand] - get help for subcommand\n"
+);

cpu/arm926ejs/mx27/generic.c

@@ -238,4 +238,3 @@ void imx_gpio_mode(int gpio_mode)
 				&regs->port[port].iconfb2);
 	}
 }
-

cpu/arm926ejs/mx27/timer.c

@@ -176,7 +176,7 @@ void set_timer (ulong t)
 	timestamp = time_to_tick(t);
 }
 
-/* delay x useconds AND perserve advance timstamp value */
+/* delay x useconds AND preserve advance timstamp value */
 void udelay (unsigned long usec)
 {
 	unsigned long long tmp;
@@ -188,4 +188,3 @@ void udelay (unsigned long usec)
 	while (get_ticks() < tmp)	/* loop till event */
 		 /*NOP*/;
 }
-

cpu/arm_cortexa8/cpu.c

@@ -78,4 +78,3 @@ static void cache_flush(void)
 {
 	asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (0));
 }
-

cpu/arm_cortexa8/omap3/cache.c

@@ -93,4 +93,3 @@ void l2_cache_disable(void)
 		__asm__ __volatile__("mov r12, %0":"=r"(j));
 	}
 }
-

doc/README.omap3

@@ -156,4 +156,3 @@ http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pd
 [8] TI OMAP3 U-Boot:
 
 http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz
-

drivers/qe/uec.c

@@ -1393,5 +1393,3 @@ int uec_standard_init(bd_t *bis)
 {
 	return uec_eth_init(bis, uec_info, ARRAY_SIZE(uec_info));
 }
-
-

include/asm-arm/arch-mx27/imx-regs.h

@@ -1,5 +1,4 @@
 /*
- *
  * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
  * (c) 2009 Ilya Yanok, Emcraft Systems <yanok@emcraft.com>
  *
@@ -506,4 +505,3 @@ struct iim_regs {
 #define IIM1_SUID		1
 
 #endif				/* _IMX_REGS_H */
-

include/configs/P2020DS.h

@@ -110,7 +110,9 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
 #define CONFIG_FSL_DDR3		1
 #undef CONFIG_FSL_DDR_INTERACTIVE
 
-// #define	CONFIG_DDR_ECC /* ECC will be enabled based on perf_mode environment variable */
+/* ECC will be enabled based on perf_mode environment variable */
+/* #define	CONFIG_DDR_ECC */
+
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE	0xDeadBeef
 
@@ -126,7 +128,6 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
 #define SPD_EEPROM_ADDRESS1	0x51	/* CTLR 0 DIMM 0 */
 
 /* These are used when DDR doesn't use SPD.  */
-//#define CONFIG_SYS_SDRAM_SIZE		512		/* DDR is 512MB */
 #define CONFIG_SYS_SDRAM_SIZE		1024		/* DDR is 1GB */
 
 /* Default settings for "stable" mode */

include/linux/mtd/concat.h

@@ -9,7 +9,6 @@
 #ifndef MTD_CONCAT_H
 #define MTD_CONCAT_H
 
-
 struct mtd_info *mtd_concat_create(
     struct mtd_info *subdev[],  /* subdevices to concatenate */
     int num_devs,               /* number of subdevices      */
@@ -18,4 +17,3 @@ struct mtd_info *mtd_concat_create(
 void mtd_concat_destroy(struct mtd_info *mtd);
 
 #endif
-

include/linux/mtd/mtd.h

@@ -113,9 +113,9 @@ struct mtd_oob_ops {
 struct mtd_info {
 	u_char type;
 	u_int32_t flags;
-	uint64_t size;	 // Total size of the MTD
+	uint64_t size;	 /* Total size of the MTD */
 
-	/* "Major" erase size for the device. Naïve users may take this
+	/* "Major" erase size for the device. Na<EFBFBD>ve users may take this
 	 * to be the only erase size available, or may use the more detailed
 	 * information below if they desire
 	 */