arm64: dts: zynqmp: Fix nand dt node
DC3 nand node is not correct, it is showing all partitions under controller node directly. Create two sub nand nodes with partitions for each. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-4-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
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Michal Simek

parent
1e01769a2d
commit
9207c48491
@@ -128,6 +128,17 @@
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arasan,has-mdma;
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num-cs = <2>;
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nand@0 {
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reg = <0x0>;
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#address-cells = <0x2>;
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#size-cells = <0x1>;
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nand-ecc-mode = "soft";
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nand-ecc-algo = "bch";
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nand-rb = <0>;
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label = "main-storage-0";
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nand-ecc-step-size = <1024>;
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nand-ecc-strength = <24>;
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partition@0 { /* for testing purpose */
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label = "nand-fsbl-uboot";
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reg = <0x0 0x0 0x400000>;
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@@ -152,30 +163,42 @@
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label = "nand-misc";
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reg = <0x0 0x3400000 0xFCC00000>;
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};
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};
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nand@1 {
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reg = <0x1>;
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#address-cells = <0x2>;
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#size-cells = <0x1>;
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nand-ecc-mode = "soft";
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nand-ecc-algo = "bch";
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nand-rb = <0>;
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label = "main-storage-1";
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nand-ecc-step-size = <1024>;
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nand-ecc-strength = <24>;
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partition@6 { /* for testing purpose */
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partition@0 { /* for testing purpose */
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label = "nand1-fsbl-uboot";
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reg = <0x1 0x0 0x400000>;
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reg = <0x0 0x0 0x400000>;
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};
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partition@7 { /* for testing purpose */
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partition@1 { /* for testing purpose */
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label = "nand1-linux";
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reg = <0x1 0x400000 0x1400000>;
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reg = <0x0 0x400000 0x1400000>;
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};
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partition@8 { /* for testing purpose */
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partition@2 { /* for testing purpose */
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label = "nand1-device-tree";
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reg = <0x1 0x1800000 0x400000>;
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reg = <0x0 0x1800000 0x400000>;
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};
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partition@9 { /* for testing purpose */
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partition@3 { /* for testing purpose */
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label = "nand1-rootfs";
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reg = <0x1 0x1C00000 0x1400000>;
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reg = <0x0 0x1C00000 0x1400000>;
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};
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partition@10 { /* for testing purpose */
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partition@4 { /* for testing purpose */
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label = "nand1-bitstream";
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reg = <0x1 0x3000000 0x400000>;
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reg = <0x0 0x3000000 0x400000>;
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};
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partition@11 { /* for testing purpose */
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partition@5 { /* for testing purpose */
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label = "nand1-misc";
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reg = <0x1 0x3400000 0xFCC00000>;
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reg = <0x0 0x3400000 0xFCC00000>;
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};
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};
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};
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