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arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433

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The TS433 uses both pcie controllers for sata and the 2nd network
interface. Set the needed data-lanes in the pcie3 phy and enable
the second pcie controller, as well as remove the bifurcation comment.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-3-heiko@sntech.de

[ upstream commit: 0f5f87a1d602a33028522784eb005647fa1b5c11 ]

(cherry picked from commit 7d8f260e65cc84076ec9456954de0f136948a2c8)
This commit is contained in:
Heiko Stuebner
2024-10-28 20:00:18 +01:00
committed by Kever Yang
parent bab293450e
commit 96cc8f32ea
1 changed files with 9 additions and 1 deletions
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10
dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts
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@@ -78,17 +78,25 @@
}; };
&pcie30phy { &pcie30phy {
data-lanes = <1 2>;
status = "okay"; status = "okay";
}; };
/* Connected to a JMicron AHCI SATA controller */ /* Connected to a JMicron AHCI SATA controller */
&pcie3x1 { &pcie3x1 {
/* The downstream dts has: rockchip,bifurcation, XXX: find out what this is about */
reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>; vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay"; status = "okay";
}; };
/* Connected to the 2.5G NIC for the upper network jack */
&pcie3x2 {
num-lanes = <1>;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&sdhci { &sdhci {
bus-width = <8>; bus-width = <8>;
max-frequency = <200000000>; max-frequency = <200000000>;