Merge git://git.denx.de/u-boot-dm

This commit is contained in:
Tom Rini
2014-12-11 20:47:34 -05:00
73 changed files with 3347 additions and 503 deletions

View File

@@ -6,6 +6,15 @@ choice
config TARGET_JETSON_TK1
bool "NVIDIA Tegra124 Jetson TK1 board"
config TARGET_NYAN_BIG
bool "Google/NVIDIA Nyan-big Chrombook"
help
Nyan Big is a Tegra124 clamshell board that is very similar
to venice2, but it has a different panel, the sdcard CD and WP
sense are flipped, and it has a different revision of the AS3722
PMIC. The retail name is the Acer Chromebook 13 CB5-311-T7NN
(13.3-inch HD, NVIDIA Tegra K1, 2GB).
config TARGET_VENICE2
bool "NVIDIA Tegra124 Venice2"
@@ -15,6 +24,7 @@ config SYS_SOC
default "tegra124"
source "board/nvidia/jetson-tk1/Kconfig"
source "board/nvidia/nyan-big/Kconfig"
source "board/nvidia/venice2/Kconfig"
endif

View File

@@ -6,6 +6,7 @@
*/
#include <common.h>
#include <i2c.h>
#include <tps6586x.h>
#include <asm/io.h>
#include <asm/arch/tegra.h>
@@ -23,9 +24,13 @@
#define VDD_TRANSITION_STEP 0x06 /* 150mv */
#define VDD_TRANSITION_RATE 0x06 /* 3.52mv/us */
#define PMI_I2C_ADDRESS 0x34 /* chip requires this address */
int pmu_set_nominal(void)
{
int core, cpu, bus;
struct udevice *bus, *dev;
int core, cpu;
int ret;
/* by default, the table has been filled with T25 settings */
switch (tegra_get_chip_sku()) {
@@ -42,12 +47,18 @@ int pmu_set_nominal(void)
return -1;
}
bus = tegra_i2c_get_dvc_bus_num();
if (bus == -1) {
ret = tegra_i2c_get_dvc_bus(&bus);
if (ret) {
debug("%s: Cannot find DVC I2C bus\n", __func__);
return -1;
return ret;
}
tps6586x_init(bus);
ret = i2c_get_chip(bus, PMI_I2C_ADDRESS, &dev);
if (ret) {
debug("%s: Cannot find DVC I2C chip\n", __func__);
return ret;
}
tps6586x_init(dev);
tps6586x_set_pwm_mode(TPS6586X_PWM_SM1);
return tps6586x_adjust_sm0_sm1(core, cpu, VDD_TRANSITION_STEP,
VDD_TRANSITION_RATE, VDD_RELATION);

View File

@@ -31,6 +31,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra30-tec-ng.dtb \
tegra114-dalmore.dtb \
tegra124-jetson-tk1.dtb \
tegra124-nyan-big.dtb \
tegra124-venice2.dtb
dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-ph1-sld3-ref.dtb \

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@@ -0,0 +1,105 @@
/*
* Keyboard dts fragment for devices that use cros-ec-keyboard
*
* Copyright (c) 2014 Google, Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <dt-bindings/input/input.h>
&cros_ec {
keyboard-controller {
compatible = "google,cros-ec-keyb";
keypad,num-rows = <8>;
keypad,num-columns = <13>;
google,needs-ghost-filter;
linux,keymap = <
MATRIX_KEY(0x00, 0x01, KEY_LEFTMETA)
MATRIX_KEY(0x00, 0x02, KEY_F1)
MATRIX_KEY(0x00, 0x03, KEY_B)
MATRIX_KEY(0x00, 0x04, KEY_F10)
MATRIX_KEY(0x00, 0x06, KEY_N)
MATRIX_KEY(0x00, 0x08, KEY_EQUAL)
MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)
MATRIX_KEY(0x01, 0x01, KEY_ESC)
MATRIX_KEY(0x01, 0x02, KEY_F4)
MATRIX_KEY(0x01, 0x03, KEY_G)
MATRIX_KEY(0x01, 0x04, KEY_F7)
MATRIX_KEY(0x01, 0x06, KEY_H)
MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE)
MATRIX_KEY(0x01, 0x09, KEY_F9)
MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE)
MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL)
MATRIX_KEY(0x02, 0x01, KEY_TAB)
MATRIX_KEY(0x02, 0x02, KEY_F3)
MATRIX_KEY(0x02, 0x03, KEY_T)
MATRIX_KEY(0x02, 0x04, KEY_F6)
MATRIX_KEY(0x02, 0x05, KEY_RIGHTBRACE)
MATRIX_KEY(0x02, 0x06, KEY_Y)
MATRIX_KEY(0x02, 0x07, KEY_102ND)
MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE)
MATRIX_KEY(0x02, 0x09, KEY_F8)
MATRIX_KEY(0x03, 0x01, KEY_GRAVE)
MATRIX_KEY(0x03, 0x02, KEY_F2)
MATRIX_KEY(0x03, 0x03, KEY_5)
MATRIX_KEY(0x03, 0x04, KEY_F5)
MATRIX_KEY(0x03, 0x06, KEY_6)
MATRIX_KEY(0x03, 0x08, KEY_MINUS)
MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)
MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL)
MATRIX_KEY(0x04, 0x01, KEY_A)
MATRIX_KEY(0x04, 0x02, KEY_D)
MATRIX_KEY(0x04, 0x03, KEY_F)
MATRIX_KEY(0x04, 0x04, KEY_S)
MATRIX_KEY(0x04, 0x05, KEY_K)
MATRIX_KEY(0x04, 0x06, KEY_J)
MATRIX_KEY(0x04, 0x08, KEY_SEMICOLON)
MATRIX_KEY(0x04, 0x09, KEY_L)
MATRIX_KEY(0x04, 0x0a, KEY_BACKSLASH)
MATRIX_KEY(0x04, 0x0b, KEY_ENTER)
MATRIX_KEY(0x05, 0x01, KEY_Z)
MATRIX_KEY(0x05, 0x02, KEY_C)
MATRIX_KEY(0x05, 0x03, KEY_V)
MATRIX_KEY(0x05, 0x04, KEY_X)
MATRIX_KEY(0x05, 0x05, KEY_COMMA)
MATRIX_KEY(0x05, 0x06, KEY_M)
MATRIX_KEY(0x05, 0x07, KEY_LEFTSHIFT)
MATRIX_KEY(0x05, 0x08, KEY_SLASH)
MATRIX_KEY(0x05, 0x09, KEY_DOT)
MATRIX_KEY(0x05, 0x0b, KEY_SPACE)
MATRIX_KEY(0x06, 0x01, KEY_1)
MATRIX_KEY(0x06, 0x02, KEY_3)
MATRIX_KEY(0x06, 0x03, KEY_4)
MATRIX_KEY(0x06, 0x04, KEY_2)
MATRIX_KEY(0x06, 0x05, KEY_8)
MATRIX_KEY(0x06, 0x06, KEY_7)
MATRIX_KEY(0x06, 0x08, KEY_0)
MATRIX_KEY(0x06, 0x09, KEY_9)
MATRIX_KEY(0x06, 0x0a, KEY_LEFTALT)
MATRIX_KEY(0x06, 0x0b, KEY_DOWN)
MATRIX_KEY(0x06, 0x0c, KEY_RIGHT)
MATRIX_KEY(0x07, 0x01, KEY_Q)
MATRIX_KEY(0x07, 0x02, KEY_E)
MATRIX_KEY(0x07, 0x03, KEY_R)
MATRIX_KEY(0x07, 0x04, KEY_W)
MATRIX_KEY(0x07, 0x05, KEY_I)
MATRIX_KEY(0x07, 0x06, KEY_U)
MATRIX_KEY(0x07, 0x07, KEY_RIGHTSHIFT)
MATRIX_KEY(0x07, 0x08, KEY_P)
MATRIX_KEY(0x07, 0x09, KEY_O)
MATRIX_KEY(0x07, 0x0b, KEY_UP)
MATRIX_KEY(0x07, 0x0c, KEY_LEFT)
>;
};
};

View File

@@ -16,7 +16,6 @@
i2c2 = "/i2c@7000c400";
i2c3 = "/i2c@7000c500";
i2c4 = "/i2c@7000c700";
i2c5 = "/i2c@7000d100";
sdhci0 = "/sdhci@700b0600";
sdhci1 = "/sdhci@700b0400";
spi0 = "/spi@7000d400";

View File

@@ -0,0 +1,365 @@
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "tegra124.dtsi"
/ {
model = "Acer Chromebook 13 CB5-311";
compatible = "google,nyan-big", "nvidia,tegra124";
aliases {
console = &uarta;
i2c0 = "/i2c@7000d000";
i2c1 = "/i2c@7000c000";
i2c2 = "/i2c@7000c400";
i2c3 = "/i2c@7000c500";
i2c4 = "/i2c@7000c700";
i2c5 = "/i2c@7000d100";
rtc0 = "/i2c@0,7000d000/pmic@40";
rtc1 = "/rtc@0,7000e000";
sdhci0 = "/sdhci@700b0600";
sdhci1 = "/sdhci@700b0400";
spi0 = "/spi@7000d400";
spi1 = "/spi@7000da00";
usb0 = "/usb@7d000000";
usb1 = "/usb@7d008000";
};
memory {
reg = <0x80000000 0x80000000>;
};
serial@70006000 {
/* Debug connector on the bottom of the board near SD card. */
status = "okay";
};
pwm@7000a000 {
status = "okay";
};
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
acodec: audio-codec@10 {
compatible = "maxim,max98090";
reg = <0x10>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
};
temperature-sensor@4c {
compatible = "ti,tmp451";
reg = <0x4c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
#thermal-sensor-cells = <1>;
};
};
i2c@7000c400 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c500 {
status = "okay";
clock-frequency = <400000>;
tpm@20 {
compatible = "infineon,slb9645tt";
reg = <0x20>;
};
};
hdmi_ddc: i2c@7000c700 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000d000 {
status = "okay";
clock-frequency = <400000>;
pmic: pmic@40 {
compatible = "ams,as3722";
reg = <0x40>;
interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
ams,system-power-controller;
#interrupt-cells = <2>;
interrupt-controller;
gpio-controller;
#gpio-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&as3722_default>;
as3722_default: pinmux {
gpio0 {
pins = "gpio0";
function = "gpio";
bias-pull-down;
};
gpio1 {
pins = "gpio1";
function = "gpio";
bias-pull-up;
};
gpio2_4_7 {
pins = "gpio2", "gpio4", "gpio7";
function = "gpio";
bias-pull-up;
};
gpio3_6 {
pins = "gpio3", "gpio6";
bias-high-impedance;
};
gpio5 {
pins = "gpio5";
function = "clk32k-out";
bias-pull-down;
};
};
};
};
spi@7000d400 {
status = "okay";
cros_ec: cros-ec@0 {
compatible = "google,cros-ec-spi";
spi-max-frequency = <3000000>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
reg = <0>;
google,cros-ec-spi-msg-delay = <2000>;
i2c-tunnel {
compatible = "google,cros-ec-i2c-tunnel";
#address-cells = <1>;
#size-cells = <0>;
google,remote-bus = <0>;
charger: bq24735@9 {
compatible = "ti,bq24735";
reg = <0x9>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(J, 0)
GPIO_ACTIVE_HIGH>;
ti,ac-detect-gpios = <&gpio
TEGRA_GPIO(J, 0)
GPIO_ACTIVE_HIGH>;
};
battery: sbs-battery@b {
compatible = "sbs,sbs-battery";
reg = <0xb>;
sbs,i2c-retry-count = <2>;
sbs,poll-retry-count = <10>;
power-supplies = <&charger>;
};
};
};
};
spi@7000da00 {
status = "okay";
spi-max-frequency = <25000000>;
flash@0 {
compatible = "winbond,w25q32dw";
reg = <0>;
};
};
pmc@7000e400 {
nvidia,invert-interrupt;
nvidia,suspend-mode = <0>;
nvidia,cpu-pwr-good-time = <500>;
nvidia,cpu-pwr-off-time = <300>;
nvidia,core-pwr-good-time = <641 3845>;
nvidia,core-pwr-off-time = <61036>;
nvidia,core-power-req-active-high;
nvidia,sys-clock-req-active-high;
};
hda@70030000 {
status = "okay";
};
sdhci@700b0000 { /* WiFi/BT on this bus */
status = "okay";
power-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
no-1-8-v;
non-removable;
};
sdhci@700b0400 { /* SD Card on this bus */
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
bus-width = <4>;
no-1-8-v;
};
sdhci@700b0600 { /* eMMC on this bus */
status = "okay";
bus-width = <8>;
no-1-8-v;
non-removable;
};
ahub@70300000 {
i2s@70301100 {
status = "okay";
};
};
usb@7d000000 { /* Rear external USB port. */
status = "okay";
};
usb-phy@7d000000 {
status = "okay";
};
usb@7d004000 { /* Internal webcam. */
status = "okay";
};
usb-phy@7d004000 {
status = "okay";
};
usb@7d008000 { /* Left external USB port. */
status = "okay";
};
usb-phy@7d008000 {
status = "okay";
};
backlight: backlight {
compatible = "pwm-backlight";
enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
pwms = <&pwm 1 1000000>;
default-brightness-level = <224>;
brightness-levels =
< 0 1 2 3 4 5 6 7
8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23
24 25 26 27 28 29 30 31
32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
256>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
gpio-keys {
compatible = "gpio-keys";
lid {
label = "Lid";
gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
linux,input-type = <5>;
linux,code = <KEY_RESERVED>;
debounce-interval = <1>;
gpio-key,wakeup;
};
power {
label = "Power";
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <30>;
gpio-key,wakeup;
};
};
panel: panel {
compatible = "auo,b133xtn01";
backlight = <&backlight>;
};
sound {
compatible = "nvidia,tegra-audio-max98090-nyan-big",
"nvidia,tegra-audio-max98090";
nvidia,model = "Acer Chromebook 13";
nvidia,audio-routing =
"Headphones", "HPR",
"Headphones", "HPL",
"Speakers", "SPKR",
"Speakers", "SPKL",
"Mic Jack", "MICBIAS",
"DMICL", "Int Mic",
"DMICR", "Int Mic",
"IN34", "Mic Jack";
nvidia,i2s-controller = <&tegra_i2s1>;
nvidia,audio-codec = <&acodec>;
clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
<&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
<&tegra_car TEGRA124_CLK_EXTERN1>;
clock-names = "pll_a", "pll_a_out0", "mclk";
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>;
};
};
#include "cros-ec-keyboard.dtsi"

View File

@@ -1,5 +1,6 @@
#include <dt-bindings/clock/tegra124-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
@@ -192,6 +193,16 @@
status = "disabled";
};
pwm: pwm@7000a000 {
compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car TEGRA124_CLK_PWM>;
resets = <&tegra_car 17>;
reset-names = "pwm";
status = "disabled";
};
spi@7000d400 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x7000d400 0x200>;
@@ -290,6 +301,109 @@
status = "disabled";
};
ahub@70300000 {
compatible = "nvidia,tegra124-ahub";
reg = <0x70300000 0x200>,
<0x70300800 0x800>,
<0x70300200 0x600>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_D_AUDIO>,
<&tegra_car TEGRA124_CLK_APBIF>;
clock-names = "d_audio", "apbif";
resets = <&tegra_car 106>, /* d_audio */
<&tegra_car 107>, /* apbif */
<&tegra_car 30>, /* i2s0 */
<&tegra_car 11>, /* i2s1 */
<&tegra_car 18>, /* i2s2 */
<&tegra_car 101>, /* i2s3 */
<&tegra_car 102>, /* i2s4 */
<&tegra_car 108>, /* dam0 */
<&tegra_car 109>, /* dam1 */
<&tegra_car 110>, /* dam2 */
<&tegra_car 10>, /* spdif */
<&tegra_car 153>, /* amx */
<&tegra_car 185>, /* amx1 */
<&tegra_car 154>, /* adx */
<&tegra_car 180>, /* adx1 */
<&tegra_car 186>, /* afc0 */
<&tegra_car 187>, /* afc1 */
<&tegra_car 188>, /* afc2 */
<&tegra_car 189>, /* afc3 */
<&tegra_car 190>, /* afc4 */
<&tegra_car 191>; /* afc5 */
reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
"i2s3", "i2s4", "dam0", "dam1", "dam2",
"spdif", "amx", "amx1", "adx", "adx1",
"afc0", "afc1", "afc2", "afc3", "afc4", "afc5";
dmas = <&apbdma 1>, <&apbdma 1>,
<&apbdma 2>, <&apbdma 2>,
<&apbdma 3>, <&apbdma 3>,
<&apbdma 4>, <&apbdma 4>,
<&apbdma 6>, <&apbdma 6>,
<&apbdma 7>, <&apbdma 7>,
<&apbdma 12>, <&apbdma 12>,
<&apbdma 13>, <&apbdma 13>,
<&apbdma 14>, <&apbdma 14>,
<&apbdma 29>, <&apbdma 29>;
dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
"rx3", "tx3", "rx4", "tx4", "rx5", "tx5",
"rx6", "tx6", "rx7", "tx7", "rx8", "tx8",
"rx9", "tx9";
ranges;
#address-cells = <1>;
#size-cells = <1>;
tegra_i2s0: i2s@70301000 {
compatible = "nvidia,tegra124-i2s";
reg = <0x70301000 0x100>;
nvidia,ahub-cif-ids = <4 4>;
clocks = <&tegra_car TEGRA124_CLK_I2S0>;
resets = <&tegra_car 30>;
reset-names = "i2s";
status = "disabled";
};
tegra_i2s1: i2s@70301100 {
compatible = "nvidia,tegra124-i2s";
reg = <0x70301100 0x100>;
nvidia,ahub-cif-ids = <5 5>;
clocks = <&tegra_car TEGRA124_CLK_I2S1>;
resets = <&tegra_car 11>;
reset-names = "i2s";
status = "disabled";
};
tegra_i2s2: i2s@70301200 {
compatible = "nvidia,tegra124-i2s";
reg = <0x70301200 0x100>;
nvidia,ahub-cif-ids = <6 6>;
clocks = <&tegra_car TEGRA124_CLK_I2S2>;
resets = <&tegra_car 18>;
reset-names = "i2s";
status = "disabled";
};
tegra_i2s3: i2s@70301300 {
compatible = "nvidia,tegra124-i2s";
reg = <0x70301300 0x100>;
nvidia,ahub-cif-ids = <7 7>;
clocks = <&tegra_car TEGRA124_CLK_I2S3>;
resets = <&tegra_car 101>;
reset-names = "i2s";
status = "disabled";
};
tegra_i2s4: i2s@70301400 {
compatible = "nvidia,tegra124-i2s";
reg = <0x70301400 0x100>;
nvidia,ahub-cif-ids = <8 8>;
clocks = <&tegra_car TEGRA124_CLK_I2S4>;
resets = <&tegra_car 102>;
reset-names = "i2s";
status = "disabled";
};
};
usb@7d000000 {
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
reg = <0x7d000000 0x4000>;

View File

@@ -6,6 +6,10 @@
model = "Avionic Design Tamonten™ NG Evaluation Carrier";
compatible = "ad,tec-ng", "nvidia,tegra30";
aliases {
i2c0 = "/i2c@7000c400";
};
/* GEN2 */
i2c@7000c400 {
status = "okay";

View File

@@ -167,6 +167,6 @@ struct i2c_ctlr {
*
* @return number of bus, or -1 if there is no DVC active
*/
int tegra_i2c_get_dvc_bus_num(void);
int tegra_i2c_get_dvc_bus(struct udevice **busp);
#endif /* _TEGRA_I2C_H_ */

View File

@@ -134,6 +134,23 @@
num-gpios = <20>;
};
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
compatible = "sandbox,i2c";
clock-frequency = <400000>;
eeprom@2c {
reg = <0x2c>;
compatible = "i2c-eeprom";
emul {
compatible = "sandbox,i2c-eeprom";
sandbox,filename = "i2c.bin";
sandbox,size = <128>;
};
};
};
spi@0 {
#address-cells = <1>;
#size-cells = <0>;

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@@ -0,0 +1,26 @@
/*
* Test-related constants for sandbox
*
* Copyright (c) 2014 Google, Inc
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_TEST_H
#define __ASM_TEST_H
/* The sandbox driver always permits an I2C device with this address */
#define SANDBOX_I2C_TEST_ADDR 0x59
enum sandbox_i2c_eeprom_test_mode {
SIE_TEST_MODE_NONE,
/* Permits read/write of only one byte per I2C transaction */
SIE_TEST_MODE_SINGLE_BYTE,
};
void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev,
enum sandbox_i2c_eeprom_test_mode mode);
void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len);
#endif