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Merge git://git.denx.de/u-boot-dm

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This commit is contained in:
Tom Rini
2014-12-11 20:47:34 -05:00
parent fc9b0b8043 b0e6ef4640
commit a5a5882611
73 changed files with 3347 additions and 503 deletions
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6
include/config_fallbacks.h
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@@ -91,4 +91,10 @@
#undef CONFIG_IMAGE_FORMAT_LEGACY
#endif
#ifdef CONFIG_DM_I2C
# ifdef CONFIG_SYS_I2C
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
# endif
#endif
#endif /* __CONFIG_FALLBACKS_H */

3
include/configs/apalis_t30.h
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@@ -26,10 +26,7 @@
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC

3
include/configs/beaver.h
View File

@@ -40,10 +40,7 @@
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC

5
include/configs/cardhu.h
View File

@@ -43,12 +43,7 @@
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC

3
include/configs/colibri_t30.h
View File

@@ -25,10 +25,7 @@
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC

5
include/configs/dalmore.h
View File

@@ -36,12 +36,7 @@
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC

5
include/configs/jetson-tk1.h
View File

@@ -25,12 +25,7 @@
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC

74
include/configs/nyan-big.h Normal file
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@@ -0,0 +1,74 @@
/*
* (C) Copyright 2014
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <linux/sizes.h>
#include "tegra124-common.h"
/* High-level configuration options */
#define V_PROMPT "Tegra124 (Nyan-big) # "
#define CONFIG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_BOARD_EARLY_INIT_F
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_CMD_I2C
/* SD/MMC */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_TEGRA_MMC
#define CONFIG_CMD_MMC
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
/* SPI */
#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */
#define CONFIG_TEGRA114_SPI_CTRLS 6
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_WINBOND
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_SF_DEFAULT_SPEED 24000000
#define CONFIG_CMD_SPI
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_USB
/* USB networking support */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
/* General networking support */
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#define CONFIG_FIT
#define CONFIG_OF_LIBFDT
#include "tegra-common-usb-gadget.h"
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

6
include/configs/rpi.h
View File

@@ -34,6 +34,7 @@
#define CONFIG_DM
#define CONFIG_CMD_DM
#define CONFIG_DM_GPIO
#define CONFIG_DM_SERIAL
/* Memory layout */
#define CONFIG_NR_DRAM_BANKS 1
@@ -51,6 +52,7 @@
CONFIG_SYS_SDRAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_MALLOC_LEN SZ_4M
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_SYS_MEMTEST_START 0x00100000
#define CONFIG_SYS_MEMTEST_END 0x00200000
#define CONFIG_LOADADDR 0x00200000
@@ -92,9 +94,7 @@
#endif
/* Console UART */
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 3000000
#define CONFIG_PL01x_PORTS { (void *)0x20201000 }
#define CONFIG_PL01X_SERIAL
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200

6
include/configs/sandbox.h
View File

@@ -112,6 +112,12 @@
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_WINBOND
#define CONFIG_DM_I2C
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C_SANDBOX
#define CONFIG_I2C_EDID
#define CONFIG_I2C_EEPROM
/* Memory things - we don't really want a memory test */
#define CONFIG_SYS_LOAD_ADDR 0x00000000
#define CONFIG_SYS_MEMTEST_START 0x00100000

3
include/configs/seaboard.h
View File

@@ -37,10 +37,7 @@
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC

5
include/configs/tec-ng.h
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@@ -23,12 +23,7 @@
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC

1
include/configs/tegra-common.h
View File

@@ -26,6 +26,7 @@
#endif
#define CONFIG_DM_SPI
#define CONFIG_DM_SPI_FLASH
#define CONFIG_DM_I2C
#define CONFIG_SYS_TIMER_RATE 1000000
#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE

3
include/configs/tegra114-common.h
View File

@@ -76,9 +76,6 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x80090000
#define CONFIG_SPL_STACK 0x800ffffc
/* Total I2C ports on Tegra114 */
#define TEGRA_I2C_NUM_CONTROLLERS 5
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10

3
include/configs/tegra124-common.h
View File

@@ -68,9 +68,6 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x80090000
#define CONFIG_SPL_STACK 0x800ffffc
/* Total I2C ports on Tegra124 */
#define TEGRA_I2C_NUM_CONTROLLERS 5
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10

3
include/configs/tegra20-common.h
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@@ -97,9 +97,6 @@
#define CONFIG_EHCI_IS_TDI
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
/* Total I2C ports on Tegra20 */
#define TEGRA_I2C_NUM_CONTROLLERS 4
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_SYS_NAND_ONFI_DETECTION

3
include/configs/tegra30-common.h
View File

@@ -73,9 +73,6 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x80090000
#define CONFIG_SPL_STACK 0x800ffffc
/* Total I2C ports on Tegra30 */
#define TEGRA_I2C_NUM_CONTROLLERS 5
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10

3
include/configs/trimslice.h
View File

@@ -34,10 +34,7 @@
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC

5
include/configs/venice2.h
View File

@@ -25,12 +25,7 @@
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC

3
include/configs/whistler.h
View File

@@ -26,10 +26,7 @@
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC

4
include/dm/uclass-id.h
View File

@@ -19,6 +19,7 @@ enum uclass_id {
UCLASS_TEST_FDT,
UCLASS_TEST_BUS,
UCLASS_SPI_EMUL, /* sandbox SPI device emulator */
UCLASS_I2C_EMUL, /* sandbox I2C device emulator */
UCLASS_SIMPLE_BUS,
/* U-Boot uclasses start here */
@@ -29,6 +30,9 @@ enum uclass_id {
UCLASS_SPI_FLASH, /* SPI flash */
UCLASS_CROS_EC, /* Chrome OS EC */
UCLASS_THERMAL, /* Thermal sensor */
UCLASS_I2C, /* I2C bus */
UCLASS_I2C_GENERIC, /* Generic I2C device */
UCLASS_I2C_EEPROM, /* I2C EEPROM device */
UCLASS_COUNT,
UCLASS_INVALID = -1,

12
include/dm/ut.h
View File

@@ -89,6 +89,18 @@ void ut_failf(struct dm_test_state *dms, const char *fname, int line,
} \
}
/* Assert that a pointer is not NULL */
#define ut_assertnonnull(expr) { \
const void *val = (expr); \
\
if (val == NULL) { \
ut_failf(dms, __FILE__, __LINE__, __func__, \
#expr " = NULL", \
"Expected non-null, got NULL"); \
return -1; \
} \
}
/* Assert that an operation succeeds (returns 0) */
#define ut_assertok(cond) ut_asserteq(0, cond)

45
include/dt-bindings/pinctrl/pinctrl-tegra.h Normal file
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@@ -0,0 +1,45 @@
/*
* This header provides constants for Tegra pinctrl bindings.
*
* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
*
* Author: Laxman Dewangan <ldewangan@nvidia.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#ifndef _DT_BINDINGS_PINCTRL_TEGRA_H
#define _DT_BINDINGS_PINCTRL_TEGRA_H
/*
* Enable/disable for diffeent dt properties. This is applicable for
* properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain,
* nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
*/
#define TEGRA_PIN_DISABLE 0
#define TEGRA_PIN_ENABLE 1
#define TEGRA_PIN_PULL_NONE 0
#define TEGRA_PIN_PULL_DOWN 1
#define TEGRA_PIN_PULL_UP 2
/* Low power mode driver */
#define TEGRA_PIN_LP_DRIVE_DIV_8 0
#define TEGRA_PIN_LP_DRIVE_DIV_4 1
#define TEGRA_PIN_LP_DRIVE_DIV_2 2
#define TEGRA_PIN_LP_DRIVE_DIV_1 3
/* Rising/Falling slew rate */
#define TEGRA_PIN_SLEW_RATE_FASTEST 0
#define TEGRA_PIN_SLEW_RATE_FAST 1
#define TEGRA_PIN_SLEW_RATE_SLOW 2
#define TEGRA_PIN_SLEW_RATE_SLOWEST 3
#endif

3
include/errno.h
View File

@@ -6,4 +6,7 @@ extern int errno;
#define __set_errno(val) do { errno = val; } while (0)
#ifdef CONFIG_ERRNO_STR
const char *errno_str(int errno);
#endif
#endif /* _ERRNO_H */

352
include/i2c.h
View File

@@ -17,6 +17,355 @@
#ifndef _I2C_H_
#define _I2C_H_
/*
* For now there are essentially two parts to this file - driver model
* here at the top, and the older code below (with CONFIG_SYS_I2C being
* most recent). The plan is to migrate everything to driver model.
* The driver model structures and API are separate as they are different
* enough as to be incompatible for compilation purposes.
*/
#ifdef CONFIG_DM_I2C
enum dm_i2c_chip_flags {
DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
};
/**
* struct dm_i2c_chip - information about an i2c chip
*
* An I2C chip is a device on the I2C bus. It sits at a particular address
* and normally supports 7-bit or 10-bit addressing.
*
* To obtain this structure, use dev_get_parentdata(dev) where dev is the
* chip to examine.
*
* @chip_addr: Chip address on bus
* @offset_len: Length of offset in bytes. A single byte offset can
* represent up to 256 bytes. A value larger than 1 may be
* needed for larger devices.
* @flags: Flags for this chip (dm_i2c_chip_flags)
* @emul: Emulator for this chip address (only used for emulation)
*/
struct dm_i2c_chip {
uint chip_addr;
uint offset_len;
uint flags;
#ifdef CONFIG_SANDBOX
struct udevice *emul;
#endif
};
/**
* struct dm_i2c_bus- information about an i2c bus
*
* An I2C bus contains 0 or more chips on it, each at its own address. The
* bus can operate at different speeds (measured in Hz, typically 100KHz
* or 400KHz).
*
* To obtain this structure, use bus->uclass_priv where bus is the I2C
* bus udevice.
*
* @speed_hz: Bus speed in hertz (typically 100000)
*/
struct dm_i2c_bus {
int speed_hz;
};
/**
* i2c_read() - read bytes from an I2C chip
*
* To obtain an I2C device (called a 'chip') given the I2C bus address you
* can use i2c_get_chip(). To obtain a bus by bus number use
* uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
*
* To set the address length of a devce use i2c_set_addr_len(). It
* defaults to 1.
*
* @dev: Chip to read from
* @offset: Offset within chip to start reading
* @buffer: Place to put data
* @len: Number of bytes to read
*
* @return 0 on success, -ve on failure
*/
int i2c_read(struct udevice *dev, uint offset, uint8_t *buffer,
int len);
/**
* i2c_write() - write bytes to an I2C chip
*
* See notes for i2c_read() above.
*
* @dev: Chip to write to
* @offset: Offset within chip to start writing
* @buffer: Buffer containing data to write
* @len: Number of bytes to write
*
* @return 0 on success, -ve on failure
*/
int i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
int len);
/**
* i2c_probe() - probe a particular chip address
*
* This can be useful to check for the existence of a chip on the bus.
* It is typically implemented by writing the chip address to the bus
* and checking that the chip replies with an ACK.
*
* @bus: Bus to probe
* @chip_addr: 7-bit address to probe (10-bit and others are not supported)
* @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
* @devp: Returns the device found, or NULL if none
* @return 0 if a chip was found at that address, -ve if not
*/
int i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
struct udevice **devp);
/**
* i2c_set_bus_speed() - set the speed of a bus
*
* @bus: Bus to adjust
* @speed: Requested speed in Hz
* @return 0 if OK, -EINVAL for invalid values
*/
int i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
/**
* i2c_get_bus_speed() - get the speed of a bus
*
* @bus: Bus to check
* @return speed of selected I2C bus in Hz, -ve on error
*/
int i2c_get_bus_speed(struct udevice *bus);
/**
* i2c_set_chip_flags() - set flags for a chip
*
* Typically addresses are 7 bits, but for 10-bit addresses you should set
* flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
*
* @dev: Chip to adjust
* @flags: New flags
* @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
*/
int i2c_set_chip_flags(struct udevice *dev, uint flags);
/**
* i2c_get_chip_flags() - get flags for a chip
*
* @dev: Chip to check
* @flagsp: Place to put flags
* @return 0 if OK, other -ve value on error
*/
int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
/**
* i2c_set_offset_len() - set the offset length for a chip
*
* The offset used to access a chip may be up to 4 bytes long. Typically it
* is only 1 byte, which is enough for chips with 256 bytes of memory or
* registers. The default value is 1, but you can call this function to
* change it.
*
* @offset_len: New offset length value (typically 1 or 2)
*/
int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
/**
* i2c_deblock() - recover a bus that is in an unknown state
*
* See the deblock() method in 'struct dm_i2c_ops' for full information
*
* @bus: Bus to recover
* @return 0 if OK, -ve on error
*/
int i2c_deblock(struct udevice *bus);
/*
* Not all of these flags are implemented in the U-Boot API
*/
enum dm_i2c_msg_flags {
I2C_M_TEN = 0x0010, /* ten-bit chip address */
I2C_M_RD = 0x0001, /* read data, from slave to master */
I2C_M_STOP = 0x8000, /* send stop after this message */
I2C_M_NOSTART = 0x4000, /* no start before this message */
I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
};
/**
* struct i2c_msg - an I2C message
*
* @addr: Slave address
* @flags: Flags (see enum dm_i2c_msg_flags)
* @len: Length of buffer in bytes, may be 0 for a probe
* @buf: Buffer to send/receive, or NULL if no data
*/
struct i2c_msg {
uint addr;
uint flags;
uint len;
u8 *buf;
};
/**
* struct i2c_msg_list - a list of I2C messages
*
* This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
* appropriate in U-Boot.
*
* @msg: Pointer to i2c_msg array
* @nmsgs: Number of elements in the array
*/
struct i2c_msg_list {
struct i2c_msg *msgs;
uint nmsgs;
};
/**
* struct dm_i2c_ops - driver operations for I2C uclass
*
* Drivers should support these operations unless otherwise noted. These
* operations are intended to be used by uclass code, not directly from
* other code.
*/
struct dm_i2c_ops {
/**
* xfer() - transfer a list of I2C messages
*
* @bus: Bus to read from
* @msg: List of messages to transfer
* @nmsgs: Number of messages in the list
* @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
* -ECOMM if the speed cannot be supported, -EPROTO if the chip
* flags cannot be supported, other -ve value on some other error
*/
int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
/**
* probe_chip() - probe for the presense of a chip address
*
* This function is optional. If omitted, the uclass will send a zero
* length message instead.
*
* @bus: Bus to probe
* @chip_addr: Chip address to probe
* @chip_flags: Probe flags (enum dm_i2c_chip_flags)
* @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
* to default probem other -ve value on error
*/
int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
/**
* set_bus_speed() - set the speed of a bus (optional)
*
* The bus speed value will be updated by the uclass if this function
* does not return an error. This method is optional - if it is not
* provided then the driver can read the speed from
* bus->uclass_priv->speed_hz
*
* @bus: Bus to adjust
* @speed: Requested speed in Hz
* @return 0 if OK, -EINVAL for invalid values
*/
int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
/**
* get_bus_speed() - get the speed of a bus (optional)
*
* Normally this can be provided by the uclass, but if you want your
* driver to check the bus speed by looking at the hardware, you can
* implement that here. This method is optional. This method would
* normally be expected to return bus->uclass_priv->speed_hz.
*
* @bus: Bus to check
* @return speed of selected I2C bus in Hz, -ve on error
*/
int (*get_bus_speed)(struct udevice *bus);
/**
* set_flags() - set the flags for a chip (optional)
*
* This is generally implemented by the uclass, but drivers can
* check the value to ensure that unsupported options are not used.
* This method is optional. If provided, this method will always be
* called when the flags change.
*
* @dev: Chip to adjust
* @flags: New flags value
* @return 0 if OK, -EINVAL if value is unsupported
*/
int (*set_flags)(struct udevice *dev, uint flags);
/**
* deblock() - recover a bus that is in an unknown state
*
* I2C is a synchronous protocol and resets of the processor in the
* middle of an access can block the I2C Bus until a powerdown of
* the full unit is done. This is because slaves can be stuck
* waiting for addition bus transitions for a transaction that will
* never complete. Resetting the I2C master does not help. The only
* way is to force the bus through a series of transitions to make
* sure that all slaves are done with the transaction. This method
* performs this 'deblocking' if support by the driver.
*
* This method is optional.
*/
int (*deblock)(struct udevice *bus);
};
#define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
/**
* i2c_get_chip() - get a device to use to access a chip on a bus
*
* This returns the device for the given chip address. The device can then
* be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
*
* @bus: Bus to examine
* @chip_addr: Chip address for the new device
* @devp: Returns pointer to new device if found or -ENODEV if not
* found
*/
int i2c_get_chip(struct udevice *bus, uint chip_addr, struct udevice **devp);
/**
* i2c_get_chip() - get a device to use to access a chip on a bus number
*
* This returns the device for the given chip address on a particular bus
* number.
*
* @busnum: Bus number to examine
* @chip_addr: Chip address for the new device
* @devp: Returns pointer to new device if found or -ENODEV if not
* found
*/
int i2c_get_chip_for_busnum(int busnum, int chip_addr, struct udevice **devp);
/**
* i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
*
* This decodes the chip address from a device tree node and puts it into
* its dm_i2c_chip structure. This should be called in your driver's
* ofdata_to_platdata() method.
*
* @blob: Device tree blob
* @node: Node offset to read from
* @spi: Place to put the decoded information
*/
int i2c_chip_ofdata_to_platdata(const void *blob, int node,
struct dm_i2c_chip *chip);
#endif
#ifndef CONFIG_DM_I2C
/*
* WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
*
@@ -451,4 +800,7 @@ int i2c_get_bus_num_fdt(int node);
* @return 0 if port was reset, -1 if not found
*/
int i2c_reset_port_fdt(const void *blob, int node);
#endif /* !CONFIG_DM_I2C */
#endif /* _I2C_H_ */

19
include/i2c_eeprom.h Normal file
View File

@@ -0,0 +1,19 @@
/*
* Copyright (c) 2014 Google, Inc
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __I2C_EEPROM
#define __I2C_EEPROM
struct i2c_eeprom_ops {
int (*read)(struct udevice *dev, int offset, uint8_t *buf, int size);
int (*write)(struct udevice *dev, int offset, const uint8_t *buf,
int size);
};
struct i2c_eeprom {
};
#endif

3
include/linux/string.h
View File

@@ -30,6 +30,9 @@ extern char * strcpy(char *,const char *);
#ifndef __HAVE_ARCH_STRNCPY
extern char * strncpy(char *,const char *, __kernel_size_t);
#endif
#ifndef __HAVE_ARCH_STRLCPY
size_t strlcpy(char *, const char *, size_t);
#endif
#ifndef __HAVE_ARCH_STRCAT
extern char * strcat(char *, const char *);
#endif

4
include/tps6586x.h
View File

@@ -44,9 +44,9 @@ int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate,
* Set up the TPS6586X I2C bus number. This will be used for all operations
* on the device. This function must be called before using other functions.
*
* @param bus I2C bus number containing the TPS6586X chip
* @param bus I2C bus containing the TPS6586X chip
* @return 0 (always succeeds)
*/
int tps6586x_init(int bus);
int tps6586x_init(struct udevice *bus);
#endif /* _TPS6586X_H_ */