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clk: mediatek: mt7622: add missing clock MUX1_SEL

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Add missing infra clock MUX1_SEL needed for CPU clock. This is needed to
match the upstream clk ID order in preparation for OF_UPSTREAM.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Christian Marangi
2024-08-03 10:43:23 +02:00
committed by Tom Rini
parent 6dfa991204
commit a942c0c3f5
2 changed files with 30 additions and 7 deletions
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13
include/dt-bindings/clock/mt7622-clk.h
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@@ -120,12 +120,13 @@
/* INFRACFG */
#define CLK_INFRA_DBGCLK_PD 0
#define CLK_INFRA_AUDIO_PD 1
#define CLK_INFRA_IRRX_PD 2
#define CLK_INFRA_APXGPT_PD 3
#define CLK_INFRA_PMIC_PD 4
#define CLK_INFRA_TRNG 5
#define CLK_INFRA_MUX1_SEL 0
#define CLK_INFRA_DBGCLK_PD 1
#define CLK_INFRA_AUDIO_PD 2
#define CLK_INFRA_IRRX_PD 3
#define CLK_INFRA_APXGPT_PD 4
#define CLK_INFRA_PMIC_PD 5
#define CLK_INFRA_TRNG 6
/* PERICFG */