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ARM: dts: stm32: convert stm32mp13 board to OF_UPSTREAM

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Enable OF_UPSTREAM flag for STM32MP13 platforms.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This commit is contained in:
Patrice Chotard
2025-04-01 15:14:05 +02:00
parent a893f01f95
commit aaddc8986a
10 changed files with 2 additions and 2981 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/dts/Makefile
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@@ -1076,9 +1076,6 @@ dtb-$(CONFIG_ASPEED_AST2600) += \
ast2600-sbp1.dtb \
ast2600-x4tf.dtb
dtb-$(CONFIG_STM32MP13X) += \
stm32mp135f-dk.dtb
dtb-$(CONFIG_STM32MP15X) += \
stm32mp157a-dk1.dtb \
stm32mp157a-dk1-scmi.dtb \

888
arch/arm/dts/stm32mp13-pinctrl.dtsi
View File

@@ -1,888 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2021 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com>
*/
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
&pinctrl {
adc1_pins_a: adc1-pins-0 {
pins {
pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
};
};
adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
pins {
pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
<STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
};
};
adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 {
pins {
pinmux = <STM32_PINMUX('A', 5, ANALOG)>, /* ADC1_INP2 */
<STM32_PINMUX('F', 13, ANALOG)>; /* ADC1_INP11 */
};
};
eth1_rgmii_pins_a: eth1-rgmii-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
<STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
<STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
<STM32_PINMUX('E', 5, AF10)>, /* ETH_RGMII_TXD3 */
<STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
<STM32_PINMUX('C', 1, AF11)>, /* ETH_RGMII_GTX_CLK */
<STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
<STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
bias-disable;
drive-push-pull;
slew-rate = <2>;
};
pins2 {
pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
<STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
<STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
<STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
<STM32_PINMUX('A', 7, AF11)>, /* ETH_RGMII_RX_CTL */
<STM32_PINMUX('D', 7, AF10)>; /* ETH_RGMII_RX_CLK */
bias-disable;
};
};
eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
<STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
<STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
<STM32_PINMUX('E', 5, ANALOG)>, /* ETH_RGMII_TXD3 */
<STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
<STM32_PINMUX('C', 1, ANALOG)>, /* ETH_RGMII_GTX_CLK */
<STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
<STM32_PINMUX('G', 2, ANALOG)>, /* ETH_MDC */
<STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
<STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
<STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD1 */
<STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD1 */
<STM32_PINMUX('A', 7, ANALOG)>, /* ETH_RGMII_RX_CTL */
<STM32_PINMUX('D', 7, ANALOG)>; /* ETH_RGMII_RX_CLK */
};
};
eth2_rgmii_pins_a: eth2-rgmii-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 7, AF11)>, /* ETH_RGMII_TXD0 */
<STM32_PINMUX('G', 11, AF10)>, /* ETH_RGMII_TXD1 */
<STM32_PINMUX('G', 1, AF10)>, /* ETH_RGMII_TXD2 */
<STM32_PINMUX('E', 6, AF11)>, /* ETH_RGMII_TXD3 */
<STM32_PINMUX('F', 6, AF11)>, /* ETH_RGMII_TX_CTL */
<STM32_PINMUX('G', 3, AF10)>, /* ETH_RGMII_GTX_CLK */
<STM32_PINMUX('B', 6, AF11)>, /* ETH_MDIO */
<STM32_PINMUX('G', 5, AF10)>; /* ETH_MDC */
bias-disable;
drive-push-pull;
slew-rate = <2>;
};
pins2 {
pinmux = <STM32_PINMUX('F', 4, AF11)>, /* ETH_RGMII_RXD0 */
<STM32_PINMUX('E', 2, AF10)>, /* ETH_RGMII_RXD1 */
<STM32_PINMUX('H', 6, AF12)>, /* ETH_RGMII_RXD2 */
<STM32_PINMUX('A', 8, AF11)>, /* ETH_RGMII_RXD3 */
<STM32_PINMUX('A', 12, AF11)>, /* ETH_RGMII_RX_CTL */
<STM32_PINMUX('H', 11, AF11)>; /* ETH_RGMII_RX_CLK */
bias-disable;
};
};
eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RGMII_TXD0 */
<STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TXD1 */
<STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TXD2 */
<STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TXD3 */
<STM32_PINMUX('G', 8, ANALOG)>, /* ETH_RGMII_TX_CTL */
<STM32_PINMUX('F', 6, ANALOG)>, /* ETH_RGMII_GTX_CLK */
<STM32_PINMUX('B', 2, ANALOG)>, /* ETH_MDIO */
<STM32_PINMUX('G', 5, ANALOG)>, /* ETH_MDC */
<STM32_PINMUX('F', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
<STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_RXD1 */
<STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_RXD2 */
<STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_RXD3 */
<STM32_PINMUX('A', 12, ANALOG)>, /* ETH_RGMII_RX_CTL */
<STM32_PINMUX('H', 11, ANALOG)>; /* ETH_RGMII_RX_CLK */
};
};
i2c1_pins_a: i2c1-0 {
pins {
pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
<STM32_PINMUX('E', 8, AF5)>; /* I2C1_SDA */
bias-disable;
drive-open-drain;
slew-rate = <0>;
};
};
i2c1_sleep_pins_a: i2c1-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
<STM32_PINMUX('E', 8, ANALOG)>; /* I2C1_SDA */
};
};
i2c5_pins_a: i2c5-0 {
pins {
pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */
<STM32_PINMUX('H', 6, AF4)>; /* I2C5_SDA */
bias-disable;
drive-open-drain;
slew-rate = <0>;
};
};
i2c5_sleep_pins_a: i2c5-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */
<STM32_PINMUX('H', 6, ANALOG)>; /* I2C5_SDA */
};
};
i2c5_pins_b: i2c5-1 {
pins {
pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */
<STM32_PINMUX('E', 13, AF4)>; /* I2C5_SDA */
bias-disable;
drive-open-drain;
slew-rate = <0>;
};
};
i2c5_sleep_pins_b: i2c5-sleep-1 {
pins {
pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */
<STM32_PINMUX('E', 13, ANALOG)>; /* I2C5_SDA */
};
};
m_can1_pins_a: m-can1-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 10, AF9)>; /* CAN1_TX */
slew-rate = <1>;
drive-push-pull;
bias-disable;
};
pins2 {
pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */
bias-disable;
};
};
m_can1_sleep_pins_a: m_can1-sleep-0 {
pins {
pinmux = <STM32_PINMUX('G', 10, ANALOG)>, /* CAN1_TX */
<STM32_PINMUX('D', 0, ANALOG)>; /* CAN1_RX */
};
};
m_can2_pins_a: m-can2-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 0, AF9)>; /* CAN2_TX */
slew-rate = <1>;
drive-push-pull;
bias-disable;
};
pins2 {
pinmux = <STM32_PINMUX('E', 0, AF9)>; /* CAN2_RX */
bias-disable;
};
};
m_can2_sleep_pins_a: m_can2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('G', 0, ANALOG)>, /* CAN2_TX */
<STM32_PINMUX('E', 0, ANALOG)>; /* CAN2_RX */
};
};
mcp23017_pins_a: mcp23017-0 {
pins {
pinmux = <STM32_PINMUX('G', 12, GPIO)>;
bias-pull-up;
};
};
pwm1_ch3n_pins_a: pwm1-ch3n-0 {
pins {
pinmux = <STM32_PINMUX('E', 12, AF1)>; /* TIM1_CH3N */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
pwm1_ch3n_sleep_pins_a: pwm1-ch3n-sleep-0 {
pins {
pinmux = <STM32_PINMUX('E', 12, ANALOG)>; /* TIM1_CH3N */
};
};
pwm3_pins_a: pwm3-0 {
pins {
pinmux = <STM32_PINMUX('B', 1, AF2)>; /* TIM3_CH4 */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
pwm3_sleep_pins_a: pwm3-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 1, ANALOG)>; /* TIM3_CH4 */
};
};
pwm4_pins_a: pwm4-0 {
pins {
pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
pwm4_sleep_pins_a: pwm4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
};
};
pwm5_pins_a: pwm5-0 {
pins {
pinmux = <STM32_PINMUX('H', 12, AF2)>; /* TIM5_CH3 */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
pwm5_sleep_pins_a: pwm5-sleep-0 {
pins {
pinmux = <STM32_PINMUX('H', 12, ANALOG)>; /* TIM5_CH3 */
};
};
pwm8_pins_a: pwm8-0 {
pins {
pinmux = <STM32_PINMUX('E', 5, AF3)>; /* TIM8_CH3 */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
pwm8_sleep_pins_a: pwm8-sleep-0 {
pins {
pinmux = <STM32_PINMUX('E', 5, ANALOG)>; /* TIM8_CH3 */
};
};
pwm13_pins_a: pwm13-0 {
pins {
pinmux = <STM32_PINMUX('A', 6, AF9)>; /* TIM13_CH1 */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
pwm13_sleep_pins_a: pwm13-sleep-0 {
pins {
pinmux = <STM32_PINMUX('A', 6, ANALOG)>; /* TIM13_CH1 */
};
};
pwm14_pins_a: pwm14-0 {
pins {
pinmux = <STM32_PINMUX('F', 9, AF9)>; /* TIM14_CH1 */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
pwm14_sleep_pins_a: pwm14-sleep-0 {
pins {
pinmux = <STM32_PINMUX('F', 9, ANALOG)>; /* TIM14_CH1 */
};
};
qspi_clk_pins_a: qspi-clk-0 {
pins {
pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
bias-disable;
drive-push-pull;
slew-rate = <3>;
};
};
qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
pins {
pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
};
};
qspi_bk1_pins_a: qspi-bk1-0 {
pins {
pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
<STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
<STM32_PINMUX('D', 11, AF9)>, /* QSPI_BK1_IO2 */
<STM32_PINMUX('H', 7, AF13)>; /* QSPI_BK1_IO3 */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
};
qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
pins {
pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
<STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
<STM32_PINMUX('D', 11, ANALOG)>, /* QSPI_BK1_IO2 */
<STM32_PINMUX('H', 7, ANALOG)>; /* QSPI_BK1_IO3 */
};
};
qspi_cs1_pins_a: qspi-cs1-0 {
pins {
pinmux = <STM32_PINMUX('B', 2, AF9)>; /* QSPI_BK1_NCS */
bias-pull-up;
drive-push-pull;
slew-rate = <1>;
};
};
qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 2, ANALOG)>; /* QSPI_BK1_NCS */
};
};
sai1a_pins_a: sai1a-0 {
pins {
pinmux = <STM32_PINMUX('A', 4, AF12)>, /* SAI1_SCK_A */
<STM32_PINMUX('D', 6, AF6)>, /* SAI1_SD_A */
<STM32_PINMUX('E', 11, AF6)>; /* SAI1_FS_A */
slew-rate = <0>;
drive-push-pull;
bias-disable;
};
};
sai1a_sleep_pins_a: sai1a-sleep-0 {
pins {
pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* SAI1_SCK_A */
<STM32_PINMUX('D', 6, ANALOG)>, /* SAI1_SD_A */
<STM32_PINMUX('E', 11, ANALOG)>; /* SAI1_FS_A */
};
};
sai1b_pins_a: sai1b-0 {
pins {
pinmux = <STM32_PINMUX('A', 0, AF6)>; /* SAI1_SD_B */
bias-disable;
};
};
sai1b_sleep_pins_a: sai1b-sleep-0 {
pins {
pinmux = <STM32_PINMUX('A', 0, ANALOG)>; /* SAI1_SD_B */
};
};
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
<STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
slew-rate = <1>;
drive-push-pull;
bias-disable;
};
};
sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
slew-rate = <1>;
drive-push-pull;
bias-disable;
};
pins2 {
pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
slew-rate = <1>;
drive-open-drain;
bias-disable;
};
};
sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
<STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
<STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
};
};
sdmmc1_clk_pins_a: sdmmc1-clk-0 {
pins {
pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
slew-rate = <1>;
drive-push-pull;
bias-disable;
};
};
sdmmc2_b4_pins_a: sdmmc2-b4-0 {
pins {
pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
<STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
<STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
<STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
};
sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
<STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
<STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
pins2 {
pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
slew-rate = <1>;
drive-open-drain;
bias-pull-up;
};
};
sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
<STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
<STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
<STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
<STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
};
};
sdmmc2_clk_pins_a: sdmmc2-clk-0 {
pins {
pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
};
sdmmc2_d47_pins_a: sdmmc2-d47-0 {
pins {
pinmux = <STM32_PINMUX('F', 0, AF10)>, /* SDMMC2_D4 */
<STM32_PINMUX('B', 9, AF10)>, /* SDMMC2_D5 */
<STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
<STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
};
sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
pins {
pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC2_D4 */
<STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC2_D5 */
<STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
<STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
};
};
spi2_pins_a: spi2-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF6)>, /* SPI2_SCK */
<STM32_PINMUX('H', 10, AF6)>; /* SPI2_MOSI */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('B', 5, AF5)>; /* SPI2_MISO */
bias-disable;
};
};
spi2_sleep_pins_a: spi2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* SPI2_SCK */
<STM32_PINMUX('B', 5, ANALOG)>, /* SPI2_MISO */
<STM32_PINMUX('H', 10, ANALOG)>; /* SPI2_MOSI */
};
};
spi3_pins_a: spi3-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 13, AF6)>, /* SPI3_SCK */
<STM32_PINMUX('F', 1, AF5)>; /* SPI3_MOSI */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 4, AF5)>; /* SPI3_MISO */
bias-disable;
};
};
spi3_sleep_pins_a: spi3-sleep-0 {
pins {
pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* SPI3_SCK */
<STM32_PINMUX('D', 4, ANALOG)>, /* SPI3_MISO */
<STM32_PINMUX('F', 1, ANALOG)>; /* SPI3_MOSI */
};
};
spi5_pins_a: spi5-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 7, AF6)>, /* SPI5_SCK */
<STM32_PINMUX('H', 3, AF5)>; /* SPI5_MOSI */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */
bias-disable;
};
};
spi5_sleep_pins_a: spi5-sleep-0 {
pins {
pinmux = <STM32_PINMUX('H', 7, ANALOG)>, /* SPI5_SCK */
<STM32_PINMUX('A', 8, ANALOG)>, /* SPI5_MISO */
<STM32_PINMUX('H', 3, ANALOG)>; /* SPI5_MOSI */
};
};
stm32g0_intn_pins_a: stm32g0-intn-0 {
pins {
pinmux = <STM32_PINMUX('I', 2, GPIO)>;
bias-pull-up;
};
};
uart4_pins_a: uart4-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
bias-disable;
};
};
uart4_idle_pins_a: uart4-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 6, ANALOG)>; /* UART4_TX */
};
pins2 {
pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
bias-disable;
};
};
uart4_sleep_pins_a: uart4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 6, ANALOG)>, /* UART4_TX */
<STM32_PINMUX('D', 8, ANALOG)>; /* UART4_RX */
};
};
uart4_pins_b: uart4-1 {
pins1 {
pinmux = <STM32_PINMUX('A', 9, AF8)>; /* UART4_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
bias-pull-up;
};
};
uart4_idle_pins_b: uart4-idle-1 {
pins1 {
pinmux = <STM32_PINMUX('A', 9, ANALOG)>; /* UART4_TX */
};
pins2 {
pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
bias-pull-up;
};
};
uart4_sleep_pins_b: uart4-sleep-1 {
pins {
pinmux = <STM32_PINMUX('A', 9, ANALOG)>, /* UART4_TX */
<STM32_PINMUX('D', 8, ANALOG)>; /* UART4_RX */
};
};
uart7_pins_a: uart7-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 2, AF8)>, /* UART7_TX */
<STM32_PINMUX('B', 12, AF7)>; /* UART7_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('E', 10, AF7)>, /* UART7_RX */
<STM32_PINMUX('G', 7, AF8)>; /* UART7_CTS_NSS */
bias-disable;
};
};
uart7_idle_pins_a: uart7-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* UART7_TX */
<STM32_PINMUX('G', 7, ANALOG)>; /* UART7_CTS_NSS */
};
pins2 {
pinmux = <STM32_PINMUX('B', 12, AF7)>; /* UART7_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('E', 10, AF7)>; /* UART7_RX */
bias-disable;
};
};
uart7_sleep_pins_a: uart7-sleep-0 {
pins {
pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* UART7_TX */
<STM32_PINMUX('B', 12, ANALOG)>, /* UART7_RTS */
<STM32_PINMUX('E', 10, ANALOG)>, /* UART7_RX */
<STM32_PINMUX('G', 7, ANALOG)>; /* UART7_CTS_NSS */
};
};
uart8_pins_a: uart8-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
bias-pull-up;
};
};
uart8_idle_pins_a: uart8-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 1, ANALOG)>; /* UART8_TX */
};
pins2 {
pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
bias-pull-up;
};
};
uart8_sleep_pins_a: uart8-sleep-0 {
pins {
pinmux = <STM32_PINMUX('E', 1, ANALOG)>, /* UART8_TX */
<STM32_PINMUX('F', 9, ANALOG)>; /* UART8_RX */
};
};
usart1_pins_a: usart1-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 0, AF7)>, /* USART1_TX */
<STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('B', 0, AF4)>, /* USART1_RX */
<STM32_PINMUX('A', 7, AF7)>; /* USART1_CTS_NSS */
bias-pull-up;
};
};
usart1_idle_pins_a: usart1-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
<STM32_PINMUX('A', 7, ANALOG)>; /* USART1_CTS_NSS */
};
pins2 {
pinmux = <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('B', 0, AF4)>; /* USART1_RX */
bias-pull-up;
};
};
usart1_sleep_pins_a: usart1-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
<STM32_PINMUX('C', 2, ANALOG)>, /* USART1_RTS */
<STM32_PINMUX('A', 7, ANALOG)>, /* USART1_CTS_NSS */
<STM32_PINMUX('B', 0, ANALOG)>; /* USART1_RX */
};
};
usart1_pins_b: usart1-1 {
pins1 {
pinmux = <STM32_PINMUX('C', 0, AF7)>; /* USART1_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 14, AF7)>; /* USART1_RX */
bias-pull-up;
};
};
usart1_idle_pins_b: usart1-idle-1 {
pins1 {
pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* USART1_TX */
};
pins2 {
pinmux = <STM32_PINMUX('D', 14, AF7)>; /* USART1_RX */
bias-pull-up;
};
};
usart1_sleep_pins_b: usart1-sleep-1 {
pins {
pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
<STM32_PINMUX('D', 14, ANALOG)>; /* USART1_RX */
};
};
usart2_pins_a: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 12, AF1)>, /* USART2_TX */
<STM32_PINMUX('D', 4, AF3)>; /* USART2_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 15, AF1)>, /* USART2_RX */
<STM32_PINMUX('E', 11, AF2)>; /* USART2_CTS_NSS */
bias-disable;
};
};
usart2_idle_pins_a: usart2-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */
<STM32_PINMUX('E', 11, ANALOG)>; /* USART2_CTS_NSS */
};
pins2 {
pinmux = <STM32_PINMUX('D', 4, AF3)>; /* USART2_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('D', 15, AF1)>; /* USART2_RX */
bias-disable;
};
};
usart2_sleep_pins_a: usart2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */
<STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
<STM32_PINMUX('D', 15, ANALOG)>, /* USART2_RX */
<STM32_PINMUX('E', 11, ANALOG)>; /* USART2_CTS_NSS */
};
};
usart2_pins_b: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 11, AF1)>, /* USART2_TX */
<STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 15, AF1)>, /* USART2_RX */
<STM32_PINMUX('E', 15, AF3)>; /* USART2_CTS_NSS */
bias-disable;
};
};
usart2_idle_pins_b: usart2-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* USART2_TX */
<STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
};
pins2 {
pinmux = <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('D', 15, AF1)>; /* USART2_RX */
bias-disable;
};
};
usart2_sleep_pins_b: usart2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* USART2_TX */
<STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
<STM32_PINMUX('D', 15, ANALOG)>, /* USART2_RX */
<STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
};
};
};

1567
arch/arm/dts/stm32mp131.dtsi
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98
arch/arm/dts/stm32mp133.dtsi
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2021 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
*/
#include "stm32mp131.dtsi"
/ {
soc {
m_can1: can@4400e000 {
compatible = "bosch,m_can";
reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
reg-names = "m_can", "message_ram";
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
clock-names = "hclk", "cclk";
bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
status = "disabled";
};
m_can2: can@4400f000 {
compatible = "bosch,m_can";
reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
reg-names = "m_can", "message_ram";
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
clock-names = "hclk", "cclk";
bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
status = "disabled";
};
adc_1: adc@48003000 {
compatible = "st,stm32mp13-adc-core";
reg = <0x48003000 0x400>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc ADC1>, <&rcc ADC1_K>;
clock-names = "bus", "adc";
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
adc1: adc@0 {
compatible = "st,stm32mp13-adc";
#io-channel-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
interrupt-parent = <&adc_1>;
interrupts = <0>;
dmas = <&dmamux1 9 0x400 0x80000001>;
dma-names = "rx";
status = "disabled";
channel@18 {
reg = <18>;
label = "vrefint";
};
};
};
eth2: eth2@5800e000 {
compatible = "snps,dwmac-4.20a", "st,stm32mp13-dwmac";
reg = <0x5800e000 0x2000>;
reg-names = "stmmaceth";
interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clock-names = "stmmaceth",
"mac-clk-tx",
"mac-clk-rx",
"ethstp",
"eth-ck";
clocks = <&rcc ETH2MAC>,
<&rcc ETH2TX>,
<&rcc ETH2RX>,
<&rcc ETH2STP>,
<&rcc ETH2CK_K>;
st,syscon = <&syscfg 0x4 0xff000000>;
snps,mixed-burst;
snps,pbl = <2>;
snps,axi-config = <&stmmac_axi_config_2>;
snps,tso;
status = "disabled";
stmmac_axi_config_2: stmmac-axi-config {
snps,wr_osr_lmt = <0x7>;
snps,rd_osr_lmt = <0x7>;
snps,blen = <0 0 0 0 16 8 4>;
};
};
};
};

12
arch/arm/dts/stm32mp135.dtsi
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2021 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
*/
#include "stm32mp133.dtsi"
/ {
soc {
};
};

376
arch/arm/dts/stm32mp135f-dk.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2021 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/regulator/st,stm32mp13-regulator.h>
#include "stm32mp135.dtsi"
#include "stm32mp13xf.dtsi"
#include "stm32mp13-pinctrl.dtsi"
/ {
model = "STMicroelectronics STM32MP135F-DK Discovery Board";
compatible = "st,stm32mp135f-dk", "st,stm32mp135";
aliases {
serial0 = &uart4;
serial1 = &usart1;
serial2 = &uart8;
serial3 = &usart2;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@c0000000 {
device_type = "memory";
reg = <0xc0000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
optee@dd000000 {
reg = <0xdd000000 0x3000000>;
no-map;
};
};
gpio-keys {
compatible = "gpio-keys";
button-user {
label = "User-PA13";
linux,code = <BTN_1>;
gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
};
leds {
compatible = "gpio-leds";
led-blue {
function = LED_FUNCTION_HEARTBEAT;
color = <LED_COLOR_ID_BLUE>;
gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
};
};
&adc_1 {
pinctrl-names = "default";
pinctrl-0 = <&adc1_usb_cc_pins_a>;
vdda-supply = <&scmi_vdd_adc>;
vref-supply = <&scmi_vdd_adc>;
status = "okay";
adc1: adc@0 {
status = "okay";
/*
* Type-C USB_PWR_CC1 & USB_PWR_CC2 on in6 & in12.
* Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
* 5 * (5.1 + 47kOhms) * 5pF => 1.3us.
* Use arbitrary margin here (e.g. 5us).
*/
channel@6 {
reg = <6>;
st,min-sample-time-ns = <5000>;
};
channel@12 {
reg = <12>;
st,min-sample-time-ns = <5000>;
};
};
};
&i2c1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c1_pins_a>;
pinctrl-1 = <&i2c1_sleep_pins_a>;
i2c-scl-rising-time-ns = <96>;
i2c-scl-falling-time-ns = <3>;
clock-frequency = <1000000>;
status = "okay";
/* spare dmas for other usage */
/delete-property/dmas;
/delete-property/dma-names;
mcp23017: pinctrl@21 {
compatible = "microchip,mcp23017";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpiog>;
pinctrl-names = "default";
pinctrl-0 = <&mcp23017_pins_a>;
interrupt-controller;
#interrupt-cells = <2>;
microchip,irq-mirror;
};
typec@53 {
compatible = "st,stm32g0-typec";
reg = <0x53>;
/* Alert pin on PI2 */
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpioi>;
/* Internal pull-up on PI2 */
pinctrl-names = "default";
pinctrl-0 = <&stm32g0_intn_pins_a>;
firmware-name = "stm32g0-ucsi.mp135f-dk.fw";
connector {
compatible = "usb-c-connector";
label = "USB-C";
port {
con_usb_c_g0_ep: endpoint {
remote-endpoint = <&usbotg_hs_ep>;
};
};
};
};
};
&i2c5 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c5_pins_a>;
pinctrl-1 = <&i2c5_sleep_pins_a>;
i2c-scl-rising-time-ns = <170>;
i2c-scl-falling-time-ns = <5>;
clock-frequency = <400000>;
status = "okay";
/* spare dmas for other usage */
/delete-property/dmas;
/delete-property/dma-names;
};
&iwdg2 {
timeout-sec = <32>;
status = "okay";
};
&rtc {
status = "okay";
};
&scmi_regu {
scmi_vdd_adc: regulator@10 {
reg = <VOLTD_SCMI_STPMIC1_LDO1>;
regulator-name = "vdd_adc";
};
scmi_vdd_usb: regulator@13 {
reg = <VOLTD_SCMI_STPMIC1_LDO4>;
regulator-name = "vdd_usb";
};
scmi_vdd_sd: regulator@14 {
reg = <VOLTD_SCMI_STPMIC1_LDO5>;
regulator-name = "vdd_sd";
};
scmi_v1v8_periph: regulator@15 {
reg = <VOLTD_SCMI_STPMIC1_LDO6>;
regulator-name = "v1v8_periph";
};
scmi_v3v3_sw: regulator@19 {
reg = <VOLTD_SCMI_STPMIC1_PWR_SW2>;
regulator-name = "v3v3_sw";
};
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
cd-gpios = <&gpioh 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp;
st,neg-edge;
bus-width = <4>;
vmmc-supply = <&scmi_vdd_sd>;
status = "okay";
};
&spi5 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi5_pins_a>;
pinctrl-1 = <&spi5_sleep_pins_a>;
status = "disabled";
};
&timers1 {
/* spare dmas for other usage */
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
pwm1: pwm {
pinctrl-0 = <&pwm1_ch3n_pins_a>;
pinctrl-1 = <&pwm1_ch3n_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
};
&timers3 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
pwm {
pinctrl-0 = <&pwm3_pins_a>;
pinctrl-1 = <&pwm3_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
timer@2 {
status = "okay";
};
};
&timers4 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
pwm {
pinctrl-0 = <&pwm4_pins_a>;
pinctrl-1 = <&pwm4_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
timer@3 {
status = "okay";
};
};
&timers8 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
pwm {
pinctrl-0 = <&pwm8_pins_a>;
pinctrl-1 = <&pwm8_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
timer@7 {
status = "okay";
};
};
&timers14 {
status = "disabled";
pwm {
pinctrl-0 = <&pwm14_pins_a>;
pinctrl-1 = <&pwm14_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
timer@13 {
status = "okay";
};
};
&uart4 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
&uart8 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart8_pins_a>;
pinctrl-1 = <&uart8_sleep_pins_a>;
pinctrl-2 = <&uart8_idle_pins_a>;
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
};
&usart1 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&usart1_pins_a>;
pinctrl-1 = <&usart1_sleep_pins_a>;
pinctrl-2 = <&usart1_idle_pins_a>;
uart-has-rtscts;
status = "disabled";
};
/* Bluetooth */
&usart2 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&usart2_pins_a>;
pinctrl-1 = <&usart2_sleep_pins_a>;
pinctrl-2 = <&usart2_idle_pins_a>;
uart-has-rtscts;
status = "okay";
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
/* onboard HUB */
hub@1 {
compatible = "usb424,2514";
reg = <1>;
vdd-supply = <&scmi_v3v3_sw>;
};
};
&usbotg_hs {
phys = <&usbphyc_port1 0>;
phy-names = "usb2-phy";
usb-role-switch;
status = "okay";
port {
usbotg_hs_ep: endpoint {
remote-endpoint = <&con_usb_c_g0_ep>;
};
};
};
&usbphyc {
status = "okay";
};
&usbphyc_port0 {
phy-supply = <&scmi_vdd_usb>;
st,current-boost-microamp = <1000>;
st,decrease-hs-slew-rate;
st,tune-hs-dc-level = <2>;
st,enable-hs-rftime-reduction;
st,trim-hs-current = <11>;
st,trim-hs-impedance = <2>;
st,tune-squelch-level = <1>;
st,enable-hs-rx-gain-eq;
st,no-hs-ftime-ctrl;
st,no-lsfs-sc;
};
&usbphyc_port1 {
phy-supply = <&scmi_vdd_usb>;
st,current-boost-microamp = <1000>;
st,decrease-hs-slew-rate;
st,tune-hs-dc-level = <2>;
st,enable-hs-rftime-reduction;
st,trim-hs-current = <11>;
st,trim-hs-impedance = <2>;
st,tune-squelch-level = <1>;
st,enable-hs-rx-gain-eq;
st,no-hs-ftime-ctrl;
st,no-lsfs-sc;
};

18
arch/arm/dts/stm32mp13xc.dtsi
View File

@@ -1,18 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2021 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
*/
/ {
soc {
cryp: crypto@54002000 {
compatible = "st,stm32mp1-cryp";
reg = <0x54002000 0x400>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CRYP1>;
resets = <&rcc CRYP1_R>;
status = "disabled";
};
};
};

18
arch/arm/dts/stm32mp13xf.dtsi
View File

@@ -1,18 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2021 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
*/
/ {
soc {
cryp: crypto@54002000 {
compatible = "st,stm32mp1-cryp";
reg = <0x54002000 0x400>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CRYP1>;
resets = <&rcc CRYP1_R>;
status = "disabled";
};
};
};

1
arch/arm/mach-stm32mp/Kconfig
View File

@@ -52,6 +52,7 @@ config STM32MP13X
select STM32_SERIAL
select SYS_ARCH_TIMER
imply CMD_NVEDIT_INFO
imply OF_UPSTREAM
help
support of STMicroelectronics SOC STM32MP13x family
STMicroelectronics MPU with core ARMv7

2
configs/stm32mp13_defconfig
View File

@@ -4,7 +4,7 @@ CONFIG_TFABOOT=y
CONFIG_SYS_MALLOC_F_LEN=0x180000
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000
CONFIG_ENV_OFFSET=0x900000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk"
CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp135f-dk"
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_STM32MP13X=y