fpga: Remove all CONFIG_SYS_* fpga related options
All these macros are completely unused by any code. CONFIG_FPGA is not a bitfield anymore. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
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@@ -27,23 +27,6 @@
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#ifndef _ALTERA_H_
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#define _ALTERA_H_
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/* Altera Model definitions
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*********************************************************************/
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#define CONFIG_SYS_ACEX1K CONFIG_SYS_FPGA_DEV( 0x1 )
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#define CONFIG_SYS_CYCLON2 CONFIG_SYS_FPGA_DEV( 0x2 )
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#define CONFIG_SYS_STRATIX_II CONFIG_SYS_FPGA_DEV( 0x4 )
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#define CONFIG_SYS_ALTERA_ACEX1K (CONFIG_SYS_FPGA_ALTERA | CONFIG_SYS_ACEX1K)
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#define CONFIG_SYS_ALTERA_CYCLON2 (CONFIG_SYS_FPGA_ALTERA | CONFIG_SYS_CYCLON2)
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#define CONFIG_SYS_ALTERA_STRATIX_II (CONFIG_SYS_FPGA_ALTERA | CONFIG_SYS_STRATIX_II)
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/* Add new models here */
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/* Altera Interface definitions
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*********************************************************************/
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#define CONFIG_SYS_ALTERA_IF_PS CONFIG_SYS_FPGA_IF( 0x1 ) /* passive serial */
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#define CONFIG_SYS_ALTERA_IF_FPP CONFIG_SYS_FPGA_IF( 0x2 ) /* fast passive parallel */
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/* Add new interfaces here */
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typedef enum { /* typedef Altera_iface */
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min_altera_iface_type, /* insert all new types after this */
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passive_serial, /* serial data and external clock */
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