arm: dts: imx8mm-venice-gw72xx: add TPM device
Add the TPM device found on the GW72xx revision F PCB. This hangs off of SPI2, uses gpio1_10 as a CS and gpio1_11 as RST#. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
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committed by
Fabio Estevam

parent
2264bfba19
commit
b1c40d0692
@@ -39,6 +39,13 @@
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gpios = <9 GPIO_ACTIVE_HIGH>;
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gpios = <9 GPIO_ACTIVE_HIGH>;
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line-name = "dio1";
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line-name = "dio1";
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};
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};
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tpm_rst {
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gpio-hog;
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output-high;
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gpios = <11 GPIO_ACTIVE_HIGH>;
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line-name = "tpm_rst#";
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};
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};
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};
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&gpio4 {
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&gpio4 {
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@@ -84,8 +84,15 @@
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&ecspi2 {
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi2>;
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pinctrl-0 = <&pinctrl_spi2>;
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cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
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cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
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<&gpio1 10 GPIO_ACTIVE_LOW>;
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status = "okay";
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status = "okay";
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tpm@1 {
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compatible = "tcg,tpm_tis-spi";
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reg = <0x1>;
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spi-max-frequency = <36000000>;
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};
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};
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};
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&gpio1 {
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&gpio1 {
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@@ -314,6 +321,7 @@
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MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
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MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
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MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
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MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
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MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
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MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
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MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6
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>;
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>;
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};
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};
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