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drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issue

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Add logic to automatically update umctl2's setting based
on phy training CDD value for rank to rank space issue

Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Oliver Chen <Oliver.Chen@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Oliver Chen
2020-04-21 14:48:09 +08:00
committed by Peng Fan
parent 3f63d27c17
commit b335966958
4 changed files with 177 additions and 0 deletions
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7
drivers/ddr/imx/imx8m/ddrphy_train.c
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@@ -8,6 +8,7 @@
#include <linux/kernel.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
#include <asm/arch/sys_proto.h>
int ddr_cfg_phy(struct dram_timing_info *dram_timing)
{
@@ -71,9 +72,15 @@ int ddr_cfg_phy(struct dram_timing_info *dram_timing)
/* Read the Message Block results */
dwc_ddrphy_apb_wr(0xd0000, 0x0);
ddrphy_init_read_msg_block(fsp_msg->fw_type);
if(fsp_msg->fw_type != FW_2D_IMAGE)
get_trained_CDD(i);
dwc_ddrphy_apb_wr(0xd0000, 0x1);
fsp_msg++;
}