arm: cache: add support for LPAE for region D$ behavior
Add LPAE support for mmu_set_region_dcache_behaviour. The function is in use in some LPAE capable board such TI DRA7xx or NXP i.MX 7. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
This commit is contained in:
@@ -61,7 +61,11 @@ __weak void mmu_page_table_flush(unsigned long start, unsigned long stop)
|
|||||||
void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
|
void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
|
||||||
enum dcache_option option)
|
enum dcache_option option)
|
||||||
{
|
{
|
||||||
|
#ifdef CONFIG_ARMV7_LPAE
|
||||||
|
u64 *page_table = (u64 *)gd->arch.tlb_addr;
|
||||||
|
#else
|
||||||
u32 *page_table = (u32 *)gd->arch.tlb_addr;
|
u32 *page_table = (u32 *)gd->arch.tlb_addr;
|
||||||
|
#endif
|
||||||
unsigned long upto, end;
|
unsigned long upto, end;
|
||||||
|
|
||||||
end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT;
|
end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT;
|
||||||
|
Reference in New Issue
Block a user