pinctrl: rockchip: rk3588: Fix support for rockchip_get_mux()
GPIO IOMUX control is located at PMU2_IOC or BUS_IOC offset on RK3588. Based on Linux commit fdc33eba11c5 ("pinctrl/rockchip: add rk3588 support"). Compared to the Linux commit, this include a fix so that the iomux of GPIO0_B4-D7 is reported correctly. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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committed by
Kever Yang

parent
264475514c
commit
c924f7efbb
@@ -14,10 +14,10 @@
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#include <linux/libfdt.h>
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#include <linux/libfdt.h>
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#include "pinctrl-rockchip.h"
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#include "pinctrl-rockchip.h"
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#include <dt-bindings/pinctrl/rockchip.h>
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#define MAX_ROCKCHIP_PINS_ENTRIES 30
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#define MAX_ROCKCHIP_PINS_ENTRIES 30
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#define MAX_ROCKCHIP_GPIO_PER_BANK 32
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#define MAX_ROCKCHIP_GPIO_PER_BANK 32
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#define RK_FUNC_GPIO 0
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static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin)
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static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin)
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{
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{
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@@ -147,6 +147,28 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
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if (bank->recalced_mask & BIT(pin))
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if (bank->recalced_mask & BIT(pin))
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rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
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rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
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if (IS_ENABLED(CONFIG_ROCKCHIP_RK3588)) {
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if (bank->bank_num == 0) {
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if (pin >= RK_PB4 && pin <= RK_PD7) {
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u32 reg0 = 0;
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reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */
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ret = regmap_read(regmap, reg0, &val);
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if (ret)
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return ret;
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ret = ((val >> bit) & mask);
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if (ret != 8)
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return ret;
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reg = reg + 0x8000; /* BUS_IOC_BASE */
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regmap = priv->regmap_base;
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}
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} else if (bank->bank_num > 0) {
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reg += 0x8000; /* BUS_IOC_BASE */
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}
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}
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ret = regmap_read(regmap, reg, &val);
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ret = regmap_read(regmap, reg, &val);
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if (ret)
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if (ret)
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return ret;
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return ret;
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