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phy: qcom: add QMP PCIe PHY driver

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Add support for the PCIe QMP PHY on the SM8550,
SM8650 and x1e80100 SoCs.

The driver is based on the Linux phy/qualcomm/phy-qcom-qmp-pcie.c
driver and adapted to U-Boot.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-phy-v1-1-bf08811d0a07@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
This commit is contained in:
Neil Armstrong
2024-11-25 09:54:24 +01:00
committed by Caleb Connolly
parent 5b7ec7fb44
commit d22fe8f2aa
17 changed files with 1702 additions and 0 deletions
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32
drivers/phy/qcom/phy-qcom-qmp-pcs-v6.h Normal file
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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2023, Linaro Limited
*/
#ifndef QCOM_PHY_QMP_PCS_V6_H_
#define QCOM_PHY_QMP_PCS_V6_H_
/* Only for QMP V6 PHY - USB/PCIe PCS registers */
#define QPHY_V6_PCS_SW_RESET 0x000
#define QPHY_V6_PCS_PCS_STATUS1 0x014
#define QPHY_V6_PCS_POWER_DOWN_CONTROL 0x040
#define QPHY_V6_PCS_START_CONTROL 0x044
#define QPHY_V6_PCS_POWER_STATE_CONFIG1 0x090
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0x0d8
#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0x0dc
#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188
#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
#define QPHY_V6_PCS_RATE_SLEW_CNTRL1 0x198
#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0
#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc
#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0
#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec
#endif