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ppc/85xx: Introduce low level write_tlb function

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Factor out the code we use to actually write a tlb entry.

set_tlb is a logical view of the TLB while write_tlb is a low level
matching the MAS registers.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
2009-09-11 11:27:00 -05:00
parent 0ead6f2ed7
commit d30f904353
3 changed files with 30 additions and 14 deletions
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24
cpu/mpc85xx/start.S
View File

@@ -1,5 +1,5 @@
/*
* Copyright 2004, 2007 Freescale Semiconductor.
* Copyright 2004, 2007-2009 Freescale Semiconductor.
* Copyright (C) 2003 Motorola,Inc.
*
* See file CREDITS for list of people who contributed to this
@@ -820,6 +820,28 @@ in32r:
/*------------------------------------------------------------------------------*/
/*
* void write_tlb(mas0, mas1, mas2, mas3, mas7)
*/
.globl write_tlb
write_tlb:
mtspr MAS0,r3
mtspr MAS1,r4
mtspr MAS2,r5
mtspr MAS3,r6
#ifdef CONFIG_ENABLE_36BIT_PHYS
mtspr MAS7,r7
#endif
li r3,0
#ifdef CONFIG_SYS_BOOK3E_HV
mtspr MAS8,r3
#endif
isync
tlbwe
msync
isync
blr
/*
* void relocate_code (addr_sp, gd, addr_moni)
*

16
cpu/mpc85xx/tlb.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright 2008 Freescale Semiconductor, Inc.
* Copyright 2008-2009 Freescale Semiconductor, Inc.
*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -42,19 +42,9 @@ void set_tlb(u8 tlb, u32 epn, u64 rpn,
_mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
_mas2 = FSL_BOOKE_MAS2(epn, wimge);
_mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
_mas7 = rpn >> 32;
_mas7 = FSL_BOOKE_MAS7(rpn);
mtspr(MAS0, _mas0);
mtspr(MAS1, _mas1);
mtspr(MAS2, _mas2);
mtspr(MAS3, _mas3);
#ifdef CONFIG_ENABLE_36BIT_PHYS
mtspr(MAS7, _mas7);
#endif
#ifdef CONFIG_SYS_BOOK3E_HV
mtspr(MAS8, 0);
#endif
asm volatile("isync;msync;tlbwe;isync");
write_tlb(_mas0, _mas1, _mas2, _mas3, _mas7);
#ifdef CONFIG_ADDR_MAP
if ((tlb == 1) && (gd->flags & GD_FLG_RELOC))