This commit is contained in:
Tom Rini
2025-02-05 12:38:50 -06:00
14 changed files with 238 additions and 28 deletions

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@@ -0,0 +1,42 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source extras for U-Boot for the S4SK board
*
* Copyright (C) 2024-2025 Renesas Electronics Corp.
*/
#include "r8a779f0-u-boot.dtsi"
/ {
aliases {
spi0 = &rpc;
/delete-property/ ethernet0;
};
};
&pfc {
qspi0_pins: qspi0 {
groups = "qspi0_ctrl", "qspi0_data4";
function = "qspi0";
};
};
&rpc {
pinctrl-0 = <&qspi0_pins>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <40000000>;
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "s25fs512s", "jedec,spi-nor";
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
spi-max-frequency = <40000000>;
};
};

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@@ -54,6 +54,12 @@ config TARGET_SPIDER
help help
Support for Renesas R-Car Gen4 Spider platform Support for Renesas R-Car Gen4 Spider platform
config TARGET_S4SK
bool "S4SK board"
imply R8A779F0
help
Support for Renesas R-Car Gen4 S4SK platform
config TARGET_WHITEHAWK config TARGET_WHITEHAWK
bool "White Hawk board" bool "White Hawk board"
imply R8A779G0 imply R8A779G0
@@ -70,6 +76,7 @@ endchoice
source "board/renesas/falcon/Kconfig" source "board/renesas/falcon/Kconfig"
source "board/renesas/spider/Kconfig" source "board/renesas/spider/Kconfig"
source "board/renesas/s4sk/Kconfig"
source "board/renesas/whitehawk/Kconfig" source "board/renesas/whitehawk/Kconfig"
source "board/renesas/grayhawk/Kconfig" source "board/renesas/grayhawk/Kconfig"

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@@ -34,7 +34,7 @@ _start:
.inst 0xe380070a /* orr r0, r0, #0x280000 */ .inst 0xe380070a /* orr r0, r0, #0x280000 */
/* APMU_RVBARPLC0 = (address of 'b reset' below) | CA_CORE0_VLD_RVBARP */ /* APMU_RVBARPLC0 = (address of 'b reset' below) | CA_CORE0_VLD_RVBARP */
.inst 0xe28f3088 /* add r3, pc, #0x88 */ .inst 0xe28f30a8 /* add r3, pc, #0xa8 */
.inst 0xe3833001 /* orr r3, r3, #1 */ .inst 0xe3833001 /* orr r3, r3, #1 */
.inst 0xe5843038 /* str r3, [r4, #56] @ 0x38 */ .inst 0xe5843038 /* str r3, [r4, #56] @ 0x38 */
@@ -75,12 +75,22 @@ _start:
.inst 0xe20230ff /* and r3, r2, #255 @ 0xff */ .inst 0xe20230ff /* and r3, r2, #255 @ 0xff */
.inst 0xe3530011 /* cmp r3, #17 */ .inst 0xe3530011 /* cmp r3, #17 */
.inst 0x1afffffb /* bne 78 <reset-0x28> */ .inst 0x1afffffb /* bne 78 <reset-0x28> */
/* Invalidate icache before jump to follow up software */
.inst 0xe3a00000 /* mov r0, #0 */
.inst 0xee070f15 /* mcr 15, 0, r0, cr7, cr5, {0} */
.inst 0xf57ff04f /* dsb sy */
.inst 0xf57ff06f /* isb sy */
/* Jump to follow up software */
.inst 0xe1a02922 /* lsr r2, r2, #18 */ .inst 0xe1a02922 /* lsr r2, r2, #18 */
.inst 0xe1a02902 /* lsl r2, r2, #18 */ .inst 0xe1a02902 /* lsl r2, r2, #18 */
.inst 0xe1a0f002 /* mov pc, r2 */ .inst 0xe1a0f002 /* mov pc, r2 */
.inst 0xeafffffe /* b 94 <reset-0xc> */ .inst 0xeafffffe /* b 94 <reset-0xc> */
.inst 0xe1a00000 /* nop @ (mov r0, r0) */ .inst 0xe1a00000 /* nop @ (mov r0, r0) */
.inst 0xe1a00000 /* nop @ (mov r0, r0) */ .inst 0xe1a00000 /* nop @ (mov r0, r0) */
.inst 0xe1a00000 /* nop @ (mov r0, r0) */
.inst 0xe1a00000 /* nop @ (mov r0, r0) */
.inst 0xe1a00000 /* nop @ (mov r0, r0) */
.inst 0xe1a00000 /* nop @ (mov r0, r0) */
/* Offset 0xa0 */ /* Offset 0xa0 */
#endif #endif
b reset b reset

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@@ -0,0 +1,15 @@
if TARGET_S4SK
config SYS_SOC
default "renesas"
config SYS_BOARD
default "s4sk"
config SYS_VENDOR
default "renesas"
config SYS_CONFIG_NAME
default "s4sk"
endif

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@@ -0,0 +1,7 @@
S4SK BOARD
M: Marek Vasut <marek.vasut+renesas@mailbox.org>
S: Maintained
F: arch/arm/dts/r8a779f4*
F: board/renesas/s4sk/
F: configs/r8a779f4_s4sk_defconfig
F: include/configs/s4sk.h

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@@ -0,0 +1,7 @@
#
# Copyright (C) 2025 Renesas Electronics Corp.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := s4sk.o

85
board/renesas/s4sk/s4sk.c Normal file
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@@ -0,0 +1,85 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2025 Marek Vasut <marek.vasut+renesas@mailbox.org>
*/
#include <dm.h>
#include <i2c.h>
#include <malloc.h>
#include <net-common.h>
#define S4SK_FPGA_I2C_BUS "i2c5"
#define S4SK_FPGA_I2C_DEV_ADDR 0x70
#define S4SK_FPGA_I2C_DEV_WIDTH 2
#define S4SK_FPGA_I2C_MAC_COUNT 4
#define S4SK_FPGA_I2C_MAC_OFFSET 0x58
#define S4SK_FPGA_I2C_MAC_WIDTH 8
int board_late_init(void)
{
/*
* Extract AVB and TSN0,1,2 MAC addresses from FPGA via I2C.
*
* In case a matching ethaddr/ethNaddr environment variable
* is not set, set it, otherwise do not override it. This
* allows users to set their own MAC addresses via ethaddr
* and ethNaddr environment variables.
*
* The ethaddr/ethNaddr mapping follows Linux kernel DT aliases
* ethernetN property assignment:
* - ethaddr ..... TSN0 (IC104 connector)
* - eth1addr .... TSN1 (IC101 connector)
* - eth2addr .... TSN2 (Expansion connector)
* - eth3addr .... AVB (CN1 connector)
*/
ofnode i2c_node = ofnode_path(S4SK_FPGA_I2C_BUS);
struct udevice *bus, *dev;
unsigned char enetaddr[6];
unsigned char macs[32]; /* Four MAC addresses in FPGA in total. */
int i, idx, j, ret;
ret = uclass_get_device_by_ofnode(UCLASS_I2C, i2c_node, &bus);
if (ret < 0) {
printf("s4sk: cannot find i2c bus (%d)\n", ret);
return 0;
}
ret = i2c_get_chip(bus, S4SK_FPGA_I2C_DEV_ADDR,
S4SK_FPGA_I2C_DEV_WIDTH, &dev);
if (ret < 0) {
printf("s4sk: cannot find i2c chip (%d)\n", ret);
return 0;
}
ret = dm_i2c_read(dev, S4SK_FPGA_I2C_MAC_OFFSET, macs, sizeof(macs));
if (ret < 0) {
printf("s4sk: failed to read MAC addresses via i2c (%d)\n", ret);
return 0;
}
for (i = 0; i < S4SK_FPGA_I2C_MAC_COUNT; i++) {
/*
* Remap TSN0,1,2 to ethaddr,eth1addr,eth2addr and
* AVB to eth3addr to match Linux /aliases ethernetN
* assignment, which starts with ethernet0 for TSN.
*/
idx = (i + 3) % 4;
ret = eth_env_get_enetaddr_by_index("eth", idx, enetaddr);
if (ret) /* ethaddr is already set */
continue;
/* Byte-wise reverse the MAC address */
for (j = 0; j < sizeof(enetaddr); j++)
enetaddr[j] = macs[i * S4SK_FPGA_I2C_MAC_WIDTH + (5 - j)];
if (!is_valid_ethaddr(enetaddr)) {
printf("s4sk: MAC address %d in FPGA not valid (%pM)\n",
i, enetaddr);
continue;
}
eth_env_set_enetaddr_by_index("eth", idx, enetaddr);
}
return 0;
}

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@@ -1,32 +1,11 @@
#include <configs/renesas_rcar4.config> #include <configs/renesas_rcar4_s4.config>
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_ARCH_RENESAS=y CONFIG_ARCH_RENESAS=y
CONFIG_RCAR_GEN4=y CONFIG_RCAR_GEN4=y
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xD00000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779f0-spider"
CONFIG_TARGET_SPIDER=y CONFIG_TARGET_SPIDER=y
CONFIG_SYS_CLK_FREQ=20000000 CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779f0-spider"
CONFIG_SYS_BOOT_GET_CMDLINE=y
CONFIG_SYS_BARGSIZE=2048
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image && tftp 0x48000000 Image-r8a779f0-spider.dtb && booti 0x48080000 - 0x48000000" CONFIG_BOOTCOMMAND="tftp 0x48080000 Image && tftp 0x48000000 Image-r8a779f0-spider.dtb && booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a779f0-spider.dtb" CONFIG_DEFAULT_FDT_FILE="r8a779f0-spider.dtb"
CONFIG_SYS_CBSIZE=2048
CONFIG_CMD_PART=y
CONFIG_CMD_UFS=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_CLK_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_MARVELL_10G=y
CONFIG_RENESAS_ETHER_SWITCH=y
CONFIG_PHY_R8A779F0_ETHERNET_SERDES=y
CONFIG_SCSI=y
CONFIG_BAUDRATE=1843200 CONFIG_BAUDRATE=1843200
CONFIG_UFS=y CONFIG_DM_PCA953X=y
CONFIG_UFS_RENESAS=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=131072

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@@ -0,0 +1,11 @@
#include <configs/renesas_rcar4_s4.config>
CONFIG_ARM=y
CONFIG_ARCH_RENESAS=y
CONFIG_RCAR_GEN4=y
CONFIG_TARGET_S4SK=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779f4-s4sk"
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image && tftp 0x48000000 Image-r8a779f4-s4sk.dtb && booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a779f4-s4sk.dtb"
CONFIG_BAUDRATE=921600
CONFIG_BOARD_LATE_INIT=y

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@@ -0,0 +1,23 @@
#include <configs/renesas_rcar4.config>
CONFIG_CLK_GPIO=y
CONFIG_CMD_PART=y
CONFIG_CMD_UFS=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_OFFSET=0xD00000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_ENV_SIZE=0x40000
CONFIG_FS_FAT_MAX_CLUSTSIZE=131072
CONFIG_LBA48=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_MARVELL_10G=y
CONFIG_PHY_R8A779F0_ETHERNET_SERDES=y
CONFIG_RENESAS_ETHER_SWITCH=y
CONFIG_SCSI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_BARGSIZE=2048
CONFIG_SYS_BOOT_GET_CMDLINE=y
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_CLK_FREQ=20000000
CONFIG_UFS=y
CONFIG_UFS_RENESAS=y

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@@ -168,6 +168,12 @@ Renesas is a SoC solutions provider for automotive and industrial applications.
- arm64 - arm64
- r8a779f0_spider_defconfig - r8a779f0_spider_defconfig
* -
- S4SK
- R8A779F4 (S4)
- arm64
- r8a779f4_s4sk_defconfig
* - * -
- White Hawk - White Hawk
- R8A779G0 (V4H) - R8A779G0 (V4H)

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@@ -183,9 +183,7 @@ int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg)
bus->set_mdc(bus, 1); bus->set_mdc(bus, 1);
bus->delay(bus); bus->delay(bus);
#ifdef DEBUG debug("%s[%s](0x%x) @ 0x%x = 0x%04x\n", __func__, miidev->name, reg, addr, rdreg);
printf("miiphy_read(0x%x) @ 0x%x = 0x%04x\n", reg, addr, rdreg);
#endif
return rdreg; return rdreg;
} }

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@@ -68,6 +68,13 @@ static int renesas_apmu_rproc_load(struct udevice *dev, ulong addr, ulong size)
flush_dcache_range(trampolineaddr, flush_dcache_range(trampolineaddr,
trampolineaddr + trampolineaddr +
sizeof(renesas_apmu_rproc_trampoline)); sizeof(renesas_apmu_rproc_trampoline));
invalidate_dcache_range(trampolineaddr,
trampolineaddr +
sizeof(renesas_apmu_rproc_trampoline));
flush_dcache_range(addr, addr + size);
invalidate_dcache_range(addr, addr + size);
asm volatile("dsb sy\n");
asm volatile("isb sy\n");
/* CR52 boot address set */ /* CR52 boot address set */
writel(trampolineaddr | APMU_CRBARP_CR_VLD_BARP, writel(trampolineaddr | APMU_CRBARP_CR_VLD_BARP,

13
include/configs/s4sk.h Normal file
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@@ -0,0 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* This file is S4SK board configuration.
*
* Copyright (C) 2024-2025 Renesas Electronics Corp.
*/
#ifndef __S4SK_H
#define __S4SK_H
#include "rcar-gen4-common.h"
#endif /* __S4SK_H */