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phycore-imx8mp: Enable CAAM in spl

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Enable CAAM in spl.

Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
This commit is contained in:
Leonard Anderweit
2025-01-17 14:20:13 +01:00
committed by Fabio Estevam
parent bb060231b6
commit e38a490810
2 changed files with 2 additions and 2 deletions
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2
board/phytec/phycore_imx8mp/spl.c
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@@ -165,6 +165,8 @@ int power_init_board(void)
void spl_board_init(void) void spl_board_init(void)
{ {
arch_misc_init();
/* Set GIC clock to 500Mhz for OD VDD_SOC. */ /* Set GIC clock to 500Mhz for OD VDD_SOC. */
clock_enable(CCGR_GIC, 0); clock_enable(CCGR_GIC, 0);
clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5)); clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5));

2
configs/phycore-imx8mp_defconfig
View File

@@ -52,7 +52,6 @@ CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
# CONFIG_SPL_CRYPTO is not set
CONFIG_SPL_I2C=y CONFIG_SPL_I2C=y
CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_POWER=y CONFIG_SPL_POWER=y
@@ -180,4 +179,3 @@ CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_IMX_WATCHDOG=y CONFIG_IMX_WATCHDOG=y
# CONFIG_SPL_SHA_HW_ACCEL is not set