colin/u-boot
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

fpga: Convert SYS_FPGA_CHECK_CTRLC to Kconfig

Browse Source 
After commit 8cca60a2cb ("Kconfig: Remove some symbols from the
whitelist") downstream builds failed for boards setting this in
include/configs/…

Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20220721133122.32428-2-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Alexander Dahl
2022-07-21 15:31:21 +02:00
committed by Michal Simek
parent 5f53e534ac
commit e8ffc1dfcb
3 changed files with 6 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
README
View File

@@ -1346,9 +1346,6 @@ The following options need to be configured:
If defined, a function that provides delays in the FPGA If defined, a function that provides delays in the FPGA
configuration driver. configuration driver.
CONFIG_SYS_FPGA_CHECK_CTRLC
Allow Control-C to interrupt FPGA configuration
CONFIG_SYS_FPGA_CHECK_ERROR CONFIG_SYS_FPGA_CHECK_ERROR
Check for configuration errors during FPGA bitfile Check for configuration errors during FPGA bitfile

6
drivers/fpga/Kconfig
View File

@@ -91,4 +91,10 @@ config FPGA_ZYNQPL
Enable FPGA driver for loading bitstream in BIT and BIN format Enable FPGA driver for loading bitstream in BIT and BIN format
on Xilinx Zynq devices. on Xilinx Zynq devices.
config SYS_FPGA_CHECK_CTRLC
bool "Allow Control-C to interrupt FPGA configuration"
depends on FPGA
help
User can interrupt FPGA configuration by pressing CTRL+C.
endmenu endmenu

7
drivers/fpga/virtex2.c
View File

@@ -45,13 +45,6 @@
#define CONFIG_SYS_FPGA_PROG_FEEDBACK #define CONFIG_SYS_FPGA_PROG_FEEDBACK
#endif #endif
/*
* Don't allow config cycle to be interrupted
*/
#ifndef CONFIG_SYS_FPGA_CHECK_CTRLC
#undef CONFIG_SYS_FPGA_CHECK_CTRLC
#endif
/* /*
* Check for errors during configuration by default * Check for errors during configuration by default
*/ */