Merge ../custodians

include/asm-avr32/arch-at32ap700x/clk.h

@@ -75,4 +75,7 @@ static inline unsigned long get_mci_clk_rate(void)
 }
 #endif
 
+/* Board code may need the SDRAM base clock as a compile-time constant */
+#define SDRAMC_BUS_HZ	(MAIN_CLK_RATE >> CFG_CLKDIV_HSB)
+
 #endif /* __ASM_AVR32_ARCH_CLK_H__ */

include/asm-avr32/sdram.h

@@ -26,6 +26,9 @@ struct sdram_info {
 	unsigned long phys_addr;
 	unsigned int row_bits, col_bits, bank_bits;
 	unsigned int cas, twr, trc, trp, trcd, tras, txsr;
+
+	/* SDRAM refresh period in cycles */
+	unsigned long refresh_period;
 };
 
 extern unsigned long sdram_init(const struct sdram_info *info);

include/configs/atngw100.h

@@ -170,13 +170,9 @@
 #define CFG_PBSIZE			(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
 #define CFG_LONGHELP			1
 
-#define CFG_MEMTEST_START						\
-	({ DECLARE_GLOBAL_DATA_PTR; gd->bd->bi_dram[0].start; })
-#define CFG_MEMTEST_END							\
-	({								\
-		DECLARE_GLOBAL_DATA_PTR;				\
-		gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;	\
-	})
+#define CFG_MEMTEST_START		CFG_SDRAM_BASE
+#define CFG_MEMTEST_END			(CFG_MEMTEST_START + 0x1f00000)
+
 #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 
 #endif /* __CONFIG_H */

include/configs/atstk1002.h

@@ -184,8 +184,8 @@
 #define CFG_MALLOC_LEN			(256*1024)
 #define CFG_DMA_ALLOC_LEN		(16384)
 
-/* Allow 2MB for the kernel run-time image */
-#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00200000)
+/* Allow 4MB for the kernel run-time image */
+#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00400000)
 #define CFG_BOOTPARAMS_LEN		(16 * 1024)
 
 /* Other configuration settings that shouldn't have to change all that often */

include/configs/atstk1004.h

@@ -167,7 +167,7 @@
 
 #define CFG_MALLOC_LEN			(256*1024)
 
-/* Allow 4MB for the kernel run-time image */
+/* Allow 2MB for the kernel run-time image */
 #define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00200000)
 #define CFG_BOOTPARAMS_LEN		(16 * 1024)